378: Machine Organization and Assembly Language, Lecture notes of Computer Architecture and Organization

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Machine Organization and Assembly Language

Winter 2011 – The Final Performance!

Slides adapted from: UIUC, Luis Ceze, Larry Snyder, Hal Perkins

Hal Perkins

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Computer architecture is the study of building computer systems. ƒ^

CSE378 is roughly split into three parts. — The first third discusses instruction set architectures—the bridge

between hardware and software. — Next, we introduce more advanced processor implementations. The

focus is on pipelining, which is one of the most important ways toimprove performance. — Finally, we talk about memory systems, I/O, and how to connect it all

together.

What is computer architecture about?

CSE 370 vs. CSE 378

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This class expands upon the computer architecture material from the lastfew weeks of CSE370, and we rely on many other ideas from CS370. — Understanding binary, hexadecimal and two’s-complement numbers is

still important. — Devices like multiplexers, registers and ALUs appear frequently. You

should know what they do, but not necessarily how they work. — Finite state machines and sequential circuits will appear again.

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We do

not

spend time with logic design topics like Karnaugh maps,

Boolean algebra, latches and flip-flops.

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X

W

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CSE 370/378 vs CSE 351/

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370/378 is “bottom-up” – from gates to logic units to registers, datapath,control to make up a processor ƒ^

351/352 is “middle-down” – start with registers, instructions, what thecompiled code does (351), then down to implementation – registers, logicunits, datapath, control (352) ƒ^

MIPS (378) vs x86 (351) — Important thing is to learn a first machine at the instruction set level— You will pick up many others during your career but the basic ideas are

the same — If we have time at the end of the quarter we’ll take a quick look at x

Who are you?

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32 students as of last night ƒ^

Who has written programs in assembly before? ƒ^

Anyone designed HW before? ƒ^

Written a threaded program before?

Administriva – The Course

The textbook provides the most comprehensive coverage

(it’s a beautiful textbook, easy to read & use)

•^

Computer Organization and Design

, Patterson and Hennessy, 4th

Edition

Lectures will present course materialSections, you signed up for one; here’s how they work ƒ

We have CSE 003 Lab (2:30-5:30) for “lab work”

We’ll use Loew 216 for “classroom work” during thefirst hour of labs as needed

—Labs will meet there this week!

Use lab time wisely, because we won’t usually bearound at other times

Don’t expect to finish lab projects during your officiallab time – start immediately and plan on outside time

TAKE NOTES

Instruction set architectures

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Interface between hardware and software — abstraction: hide HW complexity from the software through a set of

simple operations and devices add, mul, and, lw, ...

SoftwareHardware

ISA

MIPS

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In this class, we’ll use the MIPS instruction set architecture (ISA) toillustrate concepts in assembly language and machine organization^ —

Of course, the concepts are not MIPS-specific —

MIPS is just convenient because it is real, yet simple (unlike x86)

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The MIPS ISA is still used in many places today. Primarily in embeddedsystems, like:^ —

Various routers from Cisco —

Game machines like the Nintendo 64 and Sony Playstation 2

What you will need to learn soon

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You must become “fluent” in MIPS assembly: — Translate from C to MIPS and MIPS to C

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Example problem:

Write a recursive function

Here is a function pow that takes two arguments (n and m, both 32-bit

numbers) and returns n

m (i.e., n raised to the m

th

power).

intpow(int n, int m) {

if (m == 1)

return n; return n * pow(n, m-1); } Translate this into a MIPS assembly language function.

Instruction Execution Engines

Computers are instruction execution engines that endlessly run thefetch/execute cycle This course explains in detail this logical process and how it isimplemented in hardware

Instruction FetchInstruction DecodeOperand FetchInstruction ExecuteResult Return

MIPS register file

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MIPS processors have 32 registers, each of which holds a 32-bit value.^ —

Register addresses are 5 bits long. —

The data inputs and outputs are 32-bits wide.

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More registers might seem better, but there is a limit to the goodness.^ —

It’s more expensive, because of both the registers themselves as wellas the decoders and muxes needed to select individual registers. —

Instruction lengths may be affected, as we’ll see in the future.

D data

WriteD address A address

B address

A data

B data

32

×

32 Register File

5

5 5

32

32

32

MIPS register names

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MIPS register names begin with a $. There are two naming conventions:^ —

By number:

By (mostly) two-character names, such as:

$a0-$a

$s0-$s

$t0-$t

$sp

$ra

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Not all of the registers are equivalent:^ —

E.g., register $0 or $zero always contains the value 0

(go ahead, try to change it)

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Other registers have special uses, by convention:^ —

E.g., register $sp is used to hold the “stack pointer”

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You have to be a little careful in picking registers for your programs.— More about this later

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More complex arithmetic expressions may require multiple operations atthe instruction set level.

t0 = (t1 + t2)

×

(t3 - t4)

add

$t0,

$t1,

$t

# $t

contains

$t

+ $t

sub

$s0,

$t3,

$t

# Temporary

value

$s

=^

$t

-^

$t

mul

$t0,

$t0,

$s

# $t

contains

the

final

product

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Temporary registers may be necessary, since each MIPS instructions canaccess only two source registers and one destination.^ —

In this example, we could re-use $t3 instead of introducing $s0. —

But be careful not to modify registers that are needed again later.

Larger expressions

Immediate operands

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The ALU instructions we’ve seen so far expect register operands. How doyou get data into registers in the first place?^ —

Some MIPS instructions allow you to specify a signed constant, or“immediate” value, for the second source instead of a register. Forexample, here is the immediate add instruction, addi:

addi

$t0, $t1, 4

# $t0 = $t1 + 4

Immediate operands can be used in conjunction with the $zero registerto write constants into registers:

addi

$t0, $0, 4

# $t0 = 4

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MIPS is still considered a load/store architecture, because arithmeticoperands cannot be from arbitrary memory locations. They must either beregisters or constants that are embedded in the instruction.