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ARM Assembly Language Guide
ARM is an example of a Reduced Instruction Set Computer (RISC) which was designed for easy instruction pipelining. ARM has a “Load/Store” architecture since all instructions (other than the load and store instructions) must use register operands. ARM has 16 32-bit “general purpose” registers (r0, r1, r2, ... , r15), but some of these have special uses (see ARM Register Conventions table on page 4).
Unconditional Branch B LABEL Always Branch to LABEL
Branch to LABEL if r4 > r2 if it follow above CMP
BGT LABEL
(BGE, BLT, BLE, BEQ, BNE)
Conditional Branch
Compare (sets condition codes) CMP r4, r2 Sets condition codes by r4 - r
SUB r4, r2, r3 [r4] ← [r2] - [r3]
MUL r4, r2, r3 [r4] ← [r2] * [r3] (32-bit product)
Arithmetic Instruction ADD r4, r2, r3 [r4] ← [r2] + [r3] (reg. operands only, except last operand can be an 8-bit integer)
Load Address ADR r4, Mem [r4] ← load address of label Mem
MOV r4, #10 [r4] ← 10 ; 8-bit literal, but can be shifted
Move MOV r4, r2 [r4] ← [r2]
STR r4, [r3, #4] [[r3] + 4] ← [r4] ; register indirect with offset
LDR r4, [r3] [r4] ← [[r3]] ; register indirect
STR r4, Mem [Mem] ← [r4]
Memory Access LDR r4, Mem [r4] ← [Mem] ; Mem is a global variable label (Load and Store)
Register Transfer Language Description
ARM
Assembly Language
Type of Instruction
Common ARM Instructions (and psuedo-instructions )
A simple ARM assembly language program to sum the elements in an array A is given below: ; ARM Example that sums an array via the algorithm: ; SUM = 0 (uses r6 for sum) ; for I = 0 to LENGTH - 1 do (uses r1 for I) ; SUM = SUM + ARRAY[I] (uses r3 for address of A[I]) ; end for AREA SUMARRAY, CODE, READONLY ENTRY ; Always needed to indicate where to start pgm LDR r2, LENGTH SUB r2, r2, #1 ; r2 contains (LENGTH-1) MOV r6, #0 ; r6 sum set to 0 FOR_INIT MOV r1, #0 ; r1 index I set to 0 ADR r3, ARRAY ; start r3 with address of A[0] FOR_CMP CMP r1, r2 ; compare I and (LENGTH-1) BGT END_FOR ; drop out of loop if I < (LENGTH-1) LDR r4, [r3],#4 ; load r4 with A[I] then walk r3 down ARRAY ADD r6, r6, r4 ; update sum with A[I] ADD r1, r1, #1 ; increment I B FOR_CMP ; loop back to for-loop check END_FOR STR r6, SUM ; store result in SUM STOP B STOP
AREA SUMARRAY, DATA, READWRITE ALIGN SUM DCD 0XFFFFFFFF ARRAY DCD 5, 10, 15, 20, 30, 40, 50 LENGTH DCD 7
END ; Needed to stop assembly
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MOVN r4, r2 [r4] ← (NOT) [r2] Flip all the bits
BIC r4, r2, r3 [r4] ← [r2] (bit-wise AND) (NOT [r3]) BIt Clear - clear bits set in r
EOR r4, r2, r3 [r4] ← [r2] (bit-wise XOR) [r3]
ORR r4, r2, r3 [r4] ← [r2] (bit-wise OR) [r3]
AND r4, r2, #0xFF000000 [r4] ← [r2] (bit-wise AND) FF000000 16
AND r4, r2, r3 [r4] ← [r2] (bit-wise AND) [r3]
ARM Logical Instructions
Shifts can operate on 3rd register operand of arithmetic or logical instruction, e.g., r4 ← r5 AND (logical shift left r6 by 8 positions)
AND r4, r5, r6, LSL #
MOV r4, r5, ROR #3 r4 ← rotate right r5 by 3 positions. (Circulate bits)
MOV r4, r5, ASR #3 r4 ← arithmetic shift right r5 by 3 positions. (Shift with sign-extend)
MOV r4, r5, LSR #3 r4 ←logical shift right r5 by 3 positions. (Shift in zeros)
MOV r4, r5, LSL r6 r4 ← logical shift left r5 by the number of positions specified in register r
MOV r4, r5, LSL #3 r4 ← logical shift left r5 by 3 positions. (Shift in zeros)
ARM Shift and Rotate Instructions
Common usages for shift/rotate and logical instructions include:
- To calculate the address of element array[i], we calculate (base address of array) + i * 4 for an array of words. Since multiplication is a slow operation, we can shift i’s value left two bit positions. For example: ADR r3, ARRAY # load base address of ARRAY into r3 (ARRAY contains 4-byte items) LDR r2, I # load index I into r MOV r4, r2, LSL #2 # logical shift i’s value in r2 by 2 to multiply its value by 4 ADD r5, r3, r4 # finish calculation of the address of element array[i] in r LDR r4, [r5] # load the value of array[i] into r4 using the address in r
Alternatively, we can perform this same address calculation with a single ADD: ADD r5, r3, r2, LSL #2 # calculate address of array[i] in r5 with single ADD LDR r4, [r5] # load the value of array[i] into r4 using the address in r
Alternatively, ARM has some nice addressing modes to speedup array item access: LDR r4, [r3,r2,LSL #2] # load the value of array[i] into r
- Sometimes you want to manipulate individual bits in a “ string of bits ”. For example, you can represent a set of letters using a bit-string. Each bit in the bit-string is associated with a letter: bit position 0 with ‘A’, bit position 1 with ‘B’, ..., bit position 25 with ‘Z’. Bit-string bits are set to ‘1’ to indicate that their corresponding letters are in the set, and ‘0’ if not in the set. For example, the set { ‘A’, ‘B’, ‘D’, ‘Y’ } would be represented as:
'Z' 'Y' 'X'... 'E' 'D' 'C' 'B' 'A'
bit position: 25 24 23 4 3 2 1 0
{ 'A', 'B', 'D', 'Y' } is (^) 0 0 0 0 0 0 0 1 0 0 1 0 1 1
unused
To determine if a specific ASCII character, say ‘C’ (67 10 ) is in the set, you would need to build a “ mask ” containing a single “1” in bit position 2. The sequence of instructions “MOV r3, #1” followed by “MOV r3, r3, LSL #2” would build the needed mask in r3. If the bit-string set of letters is in register r5, then we can check for the character ‘C’ using the mask in r3 and the instruction “AND r6 r5, r3”. If the bit-string set in r5 contained a ‘C’, then r6 will be non-zero; otherwise r6 will be zero.
ARM Guide Page 2 of 7
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Program counter
pc
r
Receives return address on
BL
call to procedure
Link register - holds the return address
lr
r
Stack pointer - points to the top of the stack
sp
r
Caller-saved register - used by linker as a scratchregister. It can be used by a routine as a scratch register
Intra-procedure call scratch register (not preserved across call)
ip
r
Callee-saved register - pointer to bottom of call-frame
Frame pointer (if used) / Register Variable (preserved across call)
fp
r
Static base / Register Variable (preserved across call)
sl/v
r
Callee-saved register - pointer to static base in memory
Static base / Register Variable (preserved across call)
sb/v
r
Callee-saved registers - it can rely on an subprogram itcalls not to change them (so a subprogram wishing to usethese registers must save them on entry and restore thembefore it exits)
Register Variables (preserved across call)
v1 - v
r4 - r
Caller-saved registers - subprogram can use them asscratch registers, but it must also save any needed valuesbefore calling another subprogram.
First 4 arguments into a procedure
/ Scratch pad
/ Return result(s)
from a function (not preserved across call)
a1 - a
r0 - r
Comments
Role in Procedure Calls
APCSName
Reg.
ARM Register Conventions (APCS - Application Procedure Call Standard)
- allocate memory for frame by subtracting frame size from sp2) save old fp on stack and set new fp (if fp is being used)3) callee-saved registers (v1 - v7) if more registers than scratch
registers (a1-a4, ip) are needed
- save lr and any needed (a1-a4, ip) if another procedure is to be called
... code for the callee procedure
- for functions, place result(s) to be returned in a1-a46) restore any callee-saved registers (v1 - v7) from step (2) above7) restore lr and fp if it was saved on the stack in step (3)8) pop stack frame by adding frame size to sp9) return to caller by moving lr into pc
- save on stack (callee-saved regs) a1-a4/ip that are needed upon return2) place arguments to be passed in a1- a4 with additional parameters
pushed onto the stack
- BL ProcName
saves return address in lr
- restore any callee-saved registers a1-a4/ip from stack
Callee Code
Caller Code
Using ARM Calling Convention
ARM Guide Page 4 of 7
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end CalculatePowers
end Power
end for num
return result
end for pow
end if
Power(num, pow)
result = Power(n, e - 1)* n
print num “ raised to “ pow “ power is “
end main
else
result = n
for pow := 1 to powerLimit do
else if e = 1 then
for num := 2 to numLimit do
CalculatePowers(maxNum, maxPower)
result = 1 if e = 0 then
integer num, pow
maxPower = 5
integer result
maxNum = 4
integer
Power
(^
In:
integer n, integer e)
CalculatePowers
( In:
integer numLimit,integer powerLimit)
main
a) Using the ARM register conventions, what registers would be used to pass each of the following parameters to CalculatePowers:
maxPower
maxNum
b) Using the ARM register conventions, which of these parameters ("numLimit", "powerLimit", or both of them) should be moved into v-registers?( NOTE: Use an v-register for any value you still need after you come back from a subprogram/function/procedure call, e.g., call to “Power”) c) Using the ARM register conventions, what registers should be used for each of the local variables:
pow
num
d) Using the ARM register conventions, what registers would be used to pass each of the following parameters to Power:
pow
num
e) Using the ARM register conventions, which of these parameters ("n", "e", or both of them) should be moved into v-registers?f) Using the ARM register conventions, what register should be used for the local variable:
result
g) Write the code for main, CalculatePowers, and Power in ARM assembly language.
ARM Guide Page 5 of 7
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AREA CALCULATE_POWERS_EXAMPLE, CODE, READONLY ; Calculate Powers example. Calculates ENTRY MAIN ADR sp, STACK_START MOV a1, # MOV a2, # BL CALCULATE_POWERS
STOP B STOP
CALCULATE_POWERS STMFD sp!, {v1,v2,v3,v4,lr} ;v1 holds numLimit ;v2 holds powerLimit ;v3 holds num ;v4 holds pow MOV v1, a1 ; SAVE PARAMETERS TO V-REGS. MOV v2, a FOR_INIT_ MOV v3, # FOR_CMP_1 CMP v3, v BGT END_FOR_
FOR_INIT_ MOV v4, # FOR_CMP_2 CMP v4, v BGT END_FOR_ MOV a1, v3 ; CALL POWER FN MOV a2, v BL POWER NOP; PRINT WOULD BE HERE ADD v4, v4, # B FOR_CMP_ END_FOR_ ADD v3, v3, # B FOR_CMP_ END_FOR_ LDMFD sp!, {v1,v2,v3,v4,pc}
POWER STMFD sp!, {v1,lr} MOV v1, a IF_1 CMP a2, # BNE ELSE_IF_ MOV a1, # B END_IF_ ELSE_IF_1 CMP a2, # BNE ELSE_ ; a1 already contains n B END_IF_ ELSE_1 SUB a2, a2, # BL POWER MUL ip, a1, v MOV a1, ip END_IF_ LDMFD sp!, {v1,pc} AREA CALCULATE_POWERS_EXAMPLE, DATA, READWRITE
STACK_END SPACE 0x00000FF ALIGN STACK_START DCD 0 DUMMY DCD 0x END
ARM Guide Page 7 of 7
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