Understanding Addressing Modes on the 6811 Microcontroller in ECEN 3213 Spring 2005 Lab 4, Lab Reports of Electrical and Electronics Engineering

An overview of the various addressing modes available on the 6811 microcontroller, including inherent, immediate, direct, relative, and indexed addressing. It explains how each mode works and provides examples. Students will gain a solid understanding of these addressing modes and their applications.

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ECEN 3213 Spring 2005 Lab 4 January 27, 2005 page 1 of 4
ECEN 3213
Spring 2005
Lab 4
Due in Lab Section, Feb. 14, 16
Objective.
Gain familiarity with 6811 addressing modes.
Discussion.
The 6811 addressing modes are described in sec. 1.4.4 of the text. A similar description is
available in the TExaS help menu. The information necessary to determine the addressing
is specified in the operand field of an assembly language instruction.
Inherent Addressing. Some instructions do not specify an operand at all. This is called
“inherent” addressing. For example,
aba
takes the a and b registers as input operands and puts the result back into the a register. All
of the operands are understood from the op-code and there is no need for additional infor-
mation in the operand field.
Immediate Addressing. Immediate addressing specifies the operand value “immedi-
ately” in the operand field. This is only suitable for constants since the value cannot be
changed as the program runs. An immediate operand is specified by putting a “#” (pound
sign) at the beginning of the operand field. For example,
suba #$0A a = a - 10
suba #10 a = a - 10
suba #%1010 a = a - 10
specifies the value 10 be subtracted from register a. The value can be specified in any of
the three number bases recognized by the assembler. The size of the number must fit into
the number of bits allowed for the instruction operand. For example,
suba #$0A a = a - 10
subd #$000A d = d - 10
requires an 8-bit value to subtract from register a and a 16-bit value to subtract from the d
register.
Direct Addressing. There are two forms of direct addressing on the 6811. Direct page
addressing uses an 8-bit operand address to specify an address between $0000 and $00FF
(the upper byte is understood to be all zeros). Extended addressing uses a full 16-bit oper-
and address to specify an address anywhere else in memory between $0100 and $FFFF.
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ECEN 3213

Spring 2005

Lab 4

Due in Lab Section, Feb. 14, 16

Objective.

Gain familiarity with 6811 addressing modes.

Discussion.

The 6811 addressing modes are described in sec. 1.4.4 of the text. A similar description is

available in the TExaS help menu. The information necessary to determine the addressing

is specified in the operand field of an assembly language instruction.

Inherent Addressing. Some instructions do not specify an operand at all. This is called

“inherent” addressing. For example,

aba

takes the a and b registers as input operands and puts the result back into the a register. All

of the operands are understood from the op-code and there is no need for additional infor-

mation in the operand field.

Immediate Addressing. Immediate addressing specifies the operand value “immedi-

ately” in the operand field. This is only suitable for constants since the value cannot be

changed as the program runs. An immediate operand is specified by putting a “#” (pound

sign) at the beginning of the operand field. For example,

suba #$0A a = a - 10 suba #10 a = a - 10 suba #%1010 a = a - 10

specifies the value 10 be subtracted from register a. The value can be specified in any of

the three number bases recognized by the assembler. The size of the number must fit into

the number of bits allowed for the instruction operand. For example,

suba #$0A a = a - 10 subd #$000A d = d - 10

requires an 8-bit value to subtract from register a and a 16-bit value to subtract from the d

register.

Direct Addressing. There are two forms of direct addressing on the 6811. Direct page

addressing uses an 8-bit operand address to specify an address between $0000 and $00FF

(the upper byte is understood to be all zeros). Extended addressing uses a full 16-bit oper-

and address to specify an address anywhere else in memory between $0100 and $FFFF.

Fortunately, the assembler is smart enough to always use the correct addressing mode

where appropriate so that the programmer need not be concerned. For example,

org $0000 RAM var ds 1 org $D000 ROM const db 27 start lda const sta var

automatically uses direct page addressing for var and extended addressing for const.

Relative Addressing. Only branch instructions use relative addressing. Since most

branch instructions branch to other instructions that are close by, it is not necessary to

specify a full 16-bit branch address. Instead, the branch address is determined by an 8-bit

signed offset in the instruction which is added to the PC register (in addition to the normal

increment) when the branch is taken. Fortunately, the assembler calculates the correct off-

set and the programmer need not be concerned. The branch address can be regarded as a

direct address by the assembly programmer as we did in the programs we wrote in lab 3.

There is an important limitation in relative addressing that the programmer does need to

keep in mind. The offset to the branch address must be more than -128 ($80) and less than

+127 ($7F). If the branch address is further away, a jump (jmp) instruction must be used.

The jmp instruction is a “branch always” that uses a full 16-bit direct address.

org $D000 ROM here sta oldA oldA = A cba bne here if a not equal b jmp there otherwise org $E000 ROM there sta oldA oldA = A

Indexed Addressing. We have already been using all of the previous addressing modes.

Indexed addressing is a new mode that computes the operand address by adding an

unsigned offset in the instruction code to the contents of an index register, X or Y. It is

often used to reference individual elements in large linear arrays of data. For example,

org $0010 RAM address 16 array ds 5 org $D000 ROM const db 27,$AA,57,-3, start ldx #const load address of const into X index register ldy #array load address of array into Y index register lda 2,X copy const[2] = 57 into array[2] at address $ sta 2,Y

Indexed addressing with an offset of 0 is sometimes called register indirect addressing. In

this case the index register, X or Y, will contain the exact address of the operand. For

example, the following code transfers the entire set of constants from the previous exam-

ple into the array.

org $0000 RAM array ds 5 org $D000 ROM const db 27,$AA,57,-3,

Procedure.

1. Enter your program in the program window and assemble it. Remember that you must

open a microcomputer window in order to assemble your code.

2. In the microcomputer window, click on registers and then add the all the elements of

the arrays AA, BB, CC to the display. Use “h” format for the byte variables and con-

stants and “H” (default) format for the word variable and constants.

3. Run your program and make sure it stops without getting any error messages.

4. Use the View Box in the microcomputer window to complete the following table for all

the elements of CC after the program finishes.

CC

element value 0 1 2 3 4 5 6 7 8 9

Program Demonstration

The previous steps can all be done outside the assigned lab period if you wish. To get

credit for the lab (10 pts. maximum), you must complete the following steps in the

assigned lab period.

5. (2 pts) Turn in a copy of your assembly code to your lab instructor.

6. (4 pts) Turn in a copy of the tables.

7. (4 pts) Your lab instructor will give you a different comparison than AA[i] < BB[i]. In

the presence of your lab instructor, change your program code, reassemble your pro-

gram, run it and explain the results.