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May 2007^
Computer Arithmetic, Division
Part IVDivision
Number Representation
Numbers and ArithmeticRepresenting Signed NumbersRedundant Number SystemsResidue Number Systems Addition / Subtraction
Basic Addition and CountingCarry-Lookahead AddersVariations in Fast AddersMultioperand Addition Multiplication
Basic Multiplication SchemesHigh-Radix MultipliersTree and Array MultipliersVariations in Multipliers Division
Basic Division SchemesHigh-Radix DividersVariations in DividersDivision by Convergence Real Arithmetic
Floating-Point ReperesentationsFloating-Point OperationsErrors and Error ControlPrecise and Certifiable Arithmetic Function Evaluation
Square-Rooting MethodsThe CORDIC AlgorithmsVariations in Function EvaluationArithmetic by Table Lookup Implementation Topics
High-Throughput ArithmeticLow-Power ArithmeticFault-Tolerant ArithmeticPast, Present, and Future Parts^
Chapters I. II. III. IV. V. VI. VII.
1.2.3.4. 5.6.7.8. 9.10.11.12. 13.14.15.16. 17.18.19.20. 21.22.23.24. 25.26.27.28. Elementary Operations
May 2007^
Computer Arithmetic, Division About This Presentation
This presentation is intended to support the use of the textbook Computer Arithmetic: Algorithms and Hardware Designs
(Oxford
University Press, 2000, ISBN 0-19-512583-5). It is updatedregularly by the author as part of his teaching of the graduatecourse ECE 252B, Computer Arithmetic, at the University ofCalifornia, Santa Barbara. Instructors can use these slides freelyin classroom teaching and for other educational purposes.Unauthorized uses are strictly prohibited. © Behrooz Parhami Edition^
Released^
Revised^
Revised^
Revised^
Revised
First^
Jan. 2000^
Sep. 2001^
Sep. 2003^
Oct. 2005^
May 2007
May 2007^
Computer Arithmetic, Division
Be fruitful and multiply...
Now, divide.
May 2007^
Computer Arithmetic, Division 13 Basic Division Schemes Chapter Goals^ Study shift/subtract or bit-at-a-time dividersand set the stage for faster methods andvariations to be covered in Chapters 14-16 Chapter Highlights^ Shift/subtract divide vs shift/add multiplyHardware, firmware, software algorithmsDividing 2’s-complement numbersThe special case of a constant divisor
May 2007^
Computer Arithmetic, Division
13.1 Shift/Subtract Division Algorithms Notation for our discussion of division algorithms:^ z^
Dividend^
zz^2 k –1^2 k –^
.^.^.^ z
zzz 3210
d^ Divisor
dd... k –1 k –^
dd^10
q^ Quotient
qq... k –1 k –^
qq^10
s^ Remainder,
z^ – ( d^ ×^ q )^
ss^... k –1 k –^
ss^10
Initially, we assume unsigned operands Fig. 13.1^ Division of an 8-bit number by a 4-bit number in dot notation.
DividendSubtractedbit-matrix
z s^
Quotient Remainder
q
Divisor d
3 q d 2 – 32 q d 2 – 21 q d 2 – 10 q d 2 – 0
May 2007^
Computer Arithmetic, Division
Slide 8
Division versus Multiplication
Division is more complex than multiplication:Need for quotient digit selection or estimationOverflow possibility: the high-order
k^ bits of^ z
must be strictly less than
d ; this overflow check
also detects the divide-by-zero condition.
q z s Divisor d
q
Pentium III latencies Instruction
Latency^
Cycles/Issue
Load / Store
Integer Multiply
Integer Divide
Double/Single FP Multiply
Double/Single FP Add
Double/Single FP Divide
-^3^ q^ –^2^ q^ –^1^ q^ –^0
May 2007^
Computer Arithmetic, Division
Examples of Basic Division
Fig. 13.2Examples ofsequentialdivision withinteger andfractionaloperands.
Integer division
Fractional division
======================
z^
z frac^
42 d^
1 0 1 0^
d. 1 0 1 0frac^
======================
(0)^ s
(0)^ s
(0)^2 s 0 1 1 1 0 1 0 1
2 s
(0)^ 0. 1 1 1 0 1 0 1
(^4) – q 2 d^ 3 1 0 1 0^ { q^3
= 1}^ – q
d^. 1 0 1 0–
{ q =1}–
(1)^ s
(1) s
(1)^2 s 0 1 0 0 1 0 1
(1)^ s 0. 1 0 0 1 0 1 (^4) – q 2 d^ 2 0 0 0 0^ { q^2
= 0}^ – q
d^. 0 0 0 0–
{ q =0}–
(2)^ s
1 0 0 1 0 1^
(2)^ s. 1 0 0 1 0 1 (2)^2 s 1 0 0 1 0 1
(2)^2 s 1. 0 0 1 0 1 (^4) – q 2 d^ 1 1 0 1 0^ { q^1
= 1}^ – q
d^. 1 0 1 0–
{ q =1}–
(3)^ s
1 0 0 0 1^
(3)^ s. 1 0 0 0 1 (3)^2 s 1 0 0 0 1
(3)^2 s 1. 0 0 0 1 (^4) – q 2 d^ 0 1 0 1 0^ { q^0
= 1}^ – q
d^. 1 0 1 0–
{ q =1}–
(4)^ s
0 1 1 1^
(4)^ s. 0 1 1 1
s^
0 1 1 1^
s 0. 0 0 0 0 0 1 1 1frac^
q^
1 0 1 1^
q. 1 0 1 1frac^
======================
May 2007^
Computer Arithmetic, Division 13.2 Programmed Division^ Rs^ Fig. 13.3^ Register usage for programmed division.
Rq Rd
0 0^...^
0 0 0 0 k 2 d
CarryFlag
Shifted PartialRemainder
Shifted PartialQuotient Partial Remainder(2k – j Bits)
Partial Quotient(j Bits)
Nextquotientdigitinsertedhere
Divisor d
May 2007^
Computer Arithmetic, Division
Time Complexity of Programmed Division Assume^ k -bit words k^ iterations of the main loop 6 or 8 instructions per iteration, depending on the quotient bit^ Thus, 6
k^ + 3 to 8 k^
+ 3 machine instructions,
ignoring operand loads and result store+ k = 32 implies 220^
instructions on average
This is too slow for many modern applications! Microprogrammed division would be somewhat better
May 2007^
Computer Arithmetic, Division 13.3 Restoring Hardware Dividers^ Fig. 13.^
Shift/subtract sequential restoring divider.
Quotient^ q Partial remainder 0 1 Mux^ Adder c out
s^ (initial value
z ) Divisor^ d
Shift^ Load ( j ) Shift^1 c in
qk – j Quotientdigitselector MSB of( j –1) 2 s k k k Trial difference
May 2007^
Computer Arithmetic, Division
Example of RestoringUnsigned Division Fig. 13.6^ Example of restoringunsigned division.
======================= z^
0 1 1 1^ 0 1 0 1
42 d^^0
(^4) –2 d^^1
=======================(0)^ s^0
0 1 1 1^ 0 1 0 1
(0)^2 s^0
1 1 1 0^ 1 0 1
(^4) +(–2 d )^1
––––––––––––––––––––––––(1)^ s^0
0 1 0 0^ 1 0 1
Positive, so set
q = 1^3
(1)^2 s^0
1 0 0 1^ 0 1
(^4) +(–2 d )^1
––––––––––––––––––––––––(2)^ s^1
1 1 1 1^ 0 1
Negative, so set
q = 0^2
(2)^ (1)^ s =2 s^0
1 0 0 1^ 0 1
and restore (2)^2 s^1
0 0 1 0^1
(^4) +(–2 d )^1
––––––––––––––––––––––––(3)^ s^0
1 0 0 0^1
Positive, so set
q = 1^1
(3)^2 s^1
(^4) +(–2 d )^1
––––––––––––––––––––––––(4)^ s^0
0 1 1 1^
Positive, so set
q = 1^0
s^
q^
No overflow, because(0111)^ < (1010)two^
two
May 2007^
Computer Arithmetic, Division
Slide 17
13.4 Nonrestoring and Signed Division The cycle time in restoring division must accommodate:Shifting the registersAllowing signals to propagate through the adderDetermining and storing the next quotient digitStoring the trial difference, if required
Quotient^ q Partial remainder^ s^ (initial value 0 1 Mux^ Adder c out
z ) Divisor^ d
Shift^ Load ( j ) Shift^1 c in qk – j Quotient MSB ofdigit( j –1) 2 s selector k^ k k Trial difference
Later events depend on earlierones in the same cycle, causinga lengthening of the clock cycleNonrestoring division to the rescue!Assume
q = 1 and subtract k – j^ Store the result as the new PR(the partial remainder canbecome incorrect, hencethe name “nonrestoring”)
May 2007^
Computer Arithmetic, Division
Slide 19
Example of NonrestoringUnsigned Division^ Fig. 13.^
Example of
nonrestoring unsigned division.
======================= z^
0 1 1 1^ 0 1 0 1
42 d^^0
(^4) –2 d^^1
=======================(0)^ s^0
0 1 1 1^ 0 1 0 1
(0)^2 s^0
1 1 1 0^ 1 0 1
Positive, (^4) +(–2 d )^1
0 1 1 0^
so subtract
––––––––––––––––––––––––(1)^ s^0
0 1 0 0^ 1 0 1
(1)^2 s^0
1 0 0 1^ 0 1
Positive, so set
q = 1^3
(^4) +(–2 d )^1
0 1 1 0^
and subtract
––––––––––––––––––––––––(2)^ s^1
1 1 1 1^ 0 1
(2)^2 s^1
1 1 1 0^1
Negative, so set
q = 0^2
(^4) +2 d^^0
1 0 1 0^
and add
––––––––––––––––––––––––(3)^ s^0
1 0 0 0^1
(3)^2 s^1
0 0 0 1^
Positive, so set
q = 1^1
(^4) +(–2 d )^1
0 1 1 0^
and subtract
––––––––––––––––––––––––(4)^ s^0
0 1 1 1^
Positive, so set
q = 1^0
s^
q^
No overflow: (0111)
< (1010)two^
two
May 2007^
Computer Arithmetic, Division
Slide 20
Graphical Depiction ofNonrestoring Division^ Fig. 13.
Partial remaindervariations for restoring andnonrestoring division.
(^300234200117100740) –
(^296148136) – 272 112 (0) s (1)s
(3)s (^) (2)s (4)s =16s ×^2 × 2 – ×^2 –160 × 2 –
(^148) (a) Restoring (^300234200117100740) –
148136 –12^ –
272 112 (0) s (1)s
(3)s (^) (2)s (4)s =16s ×^2 –160 ×^2
×^2 ×^2 –
–160 + Partial remainder
(b) Nonrestoring
Example (0 1 1 1^ 0 1 0 1)
/ (1 0 1 0)two
two
(117)^ / (10)ten^
ten
