1
ECE 366
Computer Architecture
Instructor: Shantanu Dutt
Department of Electrical and Computer Engineering
University of Illinois at Chicago
Lecture Notes # 13
COMPUTER ARITHMETIC:
Iterative Division Techniques
c
Shantanu Dutt, UIC 1
Prepare for your exams
Study with the several resources on Docsity
Earn points to download
Earn points by helping other students or get them with a premium plan
Guidelines and tips
Prepare for your exams
Study with the several resources on Docsity
Earn points to download
Earn points by helping other students or get them with a premium plan
Computer Architecture Lecture Notes: Iterative Division Techniques in Computer Arithmetic, Study notes of Computer Architecture and Organization
A portion of lecture notes from a computer architecture course at the university of illinois at chicago, covering iterative division techniques used in computer arithmetic for unsigned and signed integers and floating-point numbers. The notes discuss various methods like shr-divisor, shl-partial-remainder, handling zeros in high-order bits, and simple and non-restoring division algorithms.
Typology: Study notes
Pre 2010
1 / 15
This page cannot be seen from the preview
Don't miss anything!
Related documents
Partial preview of the text
Download Computer Architecture Lecture Notes: Iterative Division Techniques in Computer Arithmetic and more Study notes Computer Architecture and Organization in PDF only on Docsity!
1
ECE 366
Instructor: Shantanu Dutt Computer Architecture
Department of Electrical and Computer Engineering
University of Illinois at Chicago
Lecture Notes # 13
Iterative Division TechniquesCOMPUTER ARITHMETIC:
Shantanu Dutt, UIC c
Division – Basics
Radix
^
division is essentially a trial-and-error process, in which the next
quotient bit is chosen from
Example:
than/equal to the divisor, respectivelyor 1 depending on whether the partial remainder is less than or greater Binary division is much simpler, since the next quotient bit is either a 0
Integer division: Given 2 integers
the dividend and
the divisor, we
want to obtain an integer quotient
and an integer remainder
, s.t.
Integer–FP division: Given 2 integers
the dividend and
the divisor,
4
Division – SHR-Divisor Method
Start subtraction of
from left most position of
; SHR
for next
subtraction every iteration
Pencil-paper division example:
Shantanu Dutt, UIC c
5
Division – SHL-Partial-Remainder Method
Example:shifted left by one bit Instead of shifting the divisor right by 1 bit, the partial remainder can be
Shantanu Dutt, UIC c
7
Division – Handling
with 0’s in High-Order Bits (contd.)
Problem with
having higher order bits as 0s:
Method 1: ShiftTwo ways to tackle the problem:
to the left by
^
bits (until its MSB is a 1), do the
division for
steps for an integer
(more steps for a FP
Shantanu Dutt, UIC c Example:
8
Division – Handling
with 0’s in High-Order Bits (contd.)
Problem with
having higher order bits as 0s:
Method 2: Augment
to the left by
^
bits that are all 0s.
Perform
division for
^
steps for an integer
and more steps for a FP
Shantanu Dutt, UIC c This is the type of division algorithm used in a computer Example:
10
The adder/subtracter thus also needs to be
bits; see block diagram
NOTE: The extra bit is never required when both of divider given next.
and
have the same
number
^
of bits to start with (this does not count the
^
bits that are
added later to
Shantanu Dutt, UIC c
Division – Complete Algorithm # 1
Simple restoring division algorithm:
Accumulator
Q
M
out^ C (^1)
1
1
17 17−bit Add/Sub
Dividend D
Divisor V
XOR
17
17
17
Serial division for 16−bit unsigned numbers
T
From Control Unit From Control Unit
- To compute
, store
in the
register,
in the
^
register and
0 in AC (Accumulator), and 0 in
^
(holds the quotient bit before the shift
left). Note that
is an
^
-bit register, while
^
and
are
-bit
ones, with 0’s initially in their
’th bits.
Repeat the following steps
^
times:
- Shift AC-Q-T register combination left 1 bit (initially, this has the effect of adding on
^
0s to the left of the dividend)
- Perform
(subtract divisor from
-bit partial remainder
Division – Complete Algorithm # 2
previous algorithm to restore the old value ofNon-restoring division algorithm: An extra addition step is needed in the
when the result of a sub-
- Same initialization as before.traction is negative. This step is eliminated in non-restoring division: Repeat the following steps
^
times:
- If current Q[0] is 0 and this is not the 1st iteration2. Shift AC-Q-T register combination left 1 bit then perform
else perform
- If the result is negative, set
^
, otherwise set
^
This works because: Let
be the contents of register AC-Q at the beginning
of the
^ th iteration. After a SHL and subtraction,
is computed.
In restoring division: If this result (
) is -ve, restoration and then an-
other subtraction in the next iteration gives us
14
In non-restoring division: If the result of the previous iteration (
) is
-ve, we do not restore but in the
th iteration we perform a SHL to get
and then add to get
. This gives us the same result in AC-Q