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Guidelines and problems for midterm 2 of the electrical engineering and computer sciences department's ee 105 course at the university of california, berkeley, taught by prof. Ming c. Wu in spring 2007. Questions related to small-signal amplifiers, two-stage amplifiers, and mosfet circuits.
Typology: Exams
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University of California at Berkeley College of Engineering Dept. of Electrical Engineering and Computer Sciences
Spring 2007 Prof. Ming C. Wu April 5, 2007
Guidelines
(1) Consider the following amplifier. The small-signal parameters for the transistor M are: g (^) m = 0.1 mS, r (^) o = 100 kΩ, Rs = 1 kΩ, RL = 100 kΩ, CGD = 10 fF, CGS = 100 fF, CDB = CSB = 10 fF. a) [10 pt] What is the small-signal voltage gain of the amplifier? b) [5 pt] Draw the circuit with all parasitic capacitances. Reduce the diagram to minimum number of capacitances. c) [10 pt] How many poles are there? Find all the pole frequencies. d) [5 pt] What is the 3-dB frequency of this amplifier (in Hz)? V (^) DD
I (^) BIAS
v (^) in
V (^) G
+
+
- -
R v^ out s
RL
(2) The following is a two-stage amplifier. Use the following parameters for this problem: μn Cox = 100 μA/V^2 , μp Cox = 50 μA/V^2 , (W/L) 1 = 10, (W/L) 2 = 20, (W/L) 3 = 40, (W/L) 4 = 20, VG = 1V. The threshold voltages are VTH = 0.4 V for NMOS and - 0.4V for PMOS. Ignore channel length modulation. a) [15 pt] Find the DC voltage of the output node, VOUT ( Hint: Find the DC voltage at Node X first ) b) [15 pt] Find the expression and the numerical value of the total voltage gain.
vout
M (^1)
M 2 M (^3)
M (^4) (W/L=10)
(W/L=20)
(W/L=40)
(W/L=20)
VDD = 2V
vin
VG
+
+
- -
X