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4 problems, 5 pages Exam One Solutions 4 February 2009
Problem 1 (3 parts, 30 points) Incomplete Circuits
The three parts below contain (A) a pull up network, (B) a pull down network, and (C) an expression to be implemented. For (A) and (B), complete the missing complementary switching networks so the circuit contains no floats or short and write the Boolean expression computed by the completed circuit. For (C), design the entire switching network. Assume the inputs and their complements are available.
Outy
C
A B
D
A
B
C
D
Outz
A B
C
D
A
B
C D
Outx
A B
D E F
C
A D
B
C
E
F
OUTx = A โ
D +( B + C ) (โ
E + F )
OUTy = A โ
B โ
C โ
D
OUTz = A + B + C โ
D
4 problems, 5 pages Exam One Solutions 4 February 2009
Problem 2 (2 parts, 20 points) Boolean Algebra
Part A (12 points) Transform each of the following Boolean expressions to a form where they are ready for switch level implementation (i.e., there should only be bars over input variables, not over operations). The behavior of the expression should remain unchanged. Do not implement.
OUTX = A โ
B + C โ
( D + E ) =^ A^ โ
^ B โ
C โ
(^ D + E )=^ A^ โ
^ B โ
( C^ + D + E )=^ A^ โ
B โ
( C^ + D โ
E )
OUTY = A โ
B โ
C โ
D =^ A^ +^ B โ
C โ
D =^ A^ + B โ
( C^ + D )
Part B (8 points) Derive a canonical sum of products (using minterms) and a product of sums (using maxterms) expression for the truth table below.
A B C F(A,B,C) 0 0 0 0 1 0 0 0 0 1 0 1 1 1 0 0 0 0 1 1 1 0 1 1 0 1 1 0 1 1 1 1
SOP(MINTERMS) = A โ
B โ
C + A โ
B โ
C + A โ
B โ
C + A โ
B โ
C
POS(MAXTERMS) = ( A + B + C ) (โ
A + B + C ) (โ
A + B + C ) (โ
A + B + C )
4 problems, 5 pages Exam One Solutions 4 February 2009
Part C (12 points) For the follow expression, derive a simplified product of sums expression using a Karnaugh Map. Circle and list all prime implicants, indicating which are essential.
Out =( A + B + C )โ
( B + C + D )โ
( A + C + D )โ
( B + C + D )
0 0 1 1
0 0 1 1
1 1 1 1
0 0 0 1
A
A
B B
C
C
C
D
D D
prime implicants
essential? yes no
B + C
A + B
A + C+ D
simplified POS expression ( A + B ) (โ
B + C ) (โ
A + C + D )
Problem 4 (2 parts, 22 points) Mixed Logic Design
Part A (10 points) Implement the following expression using multi-input NAND gates and inverters. Minimize the total transistors (switches) required. Use proper mixed logic design technique. Do not simplify the expression.
OUT (^) X = ( A โ
B + C ) โ
D
A B
D
C OUTX
transistors = (^) 3 x 4t + 1 x 2t = 14t
4 problems, 5 pages Exam One Solutions 4 February 2009
Part B (12 points) Implement the following two expressions using multi-input NOR gates and inverters. Minimize the total transistors (switches) required. Use proper mixed logic design technique. Do not simplify the expressions.
OUTY = A โ
( B + C ) OUTZ = B + C + D
A
B
D
OUTY
C OUTZ
transistors = (^) 3 x 4t + 1 x 2t = 14t
