Download Exam Solutions for ECE 2030 H Computer Engineering Spring 2004 - Problems 1 to 4 and more Exams Computer Science in PDF only on Docsity!
4 problems, 5 pages Exam One Solutions 5 February 2004
Problem 1 (2 parts, 24 points) Switch-level Design
Part A (16 points) For each expression below, create a switch level implementation using N and P type switches. Assume both inputs and their complements are available. Your design should contain no shorts or floats. Use as few transistors as possible.
Outy
B
C D
Outx
D A
F
B
C
B C
E
F
D E
A
C
E
A B
E
A
D
F
F
OUTx = ( A + B โ
C + D + E )โ
F OUTy = ( A + B )( C + D โ
E + F )
Part B (8 points) Transform the following Boolean expression to a form where it can be implemented using switches (i.e., there should be no bars in the expression except for complements of the inputs A, B, C, etc.). The behavior of the expression should remain unchanged.
Out (^) X = ( A โ
B โ
C + E โ
FD )โ
G โ
H Out (^) X = ( A โ
B โ
C + E โ
FD )+ G โ
H Out (^) X = ( A โ
B โ
C โ
E โ
FD )+ G โ
H Out (^) X = (( AB + C )โ
( E + FD ))+ G โ
H
4 problems, 5 pages Exam One Solutions 5 February 2004
Problem 2 (3 parts, 30 points) Mixed Logic Reengineering
D
E
C
B
OUTy
OUTx
A
Part A (10 points) Write the output expressions for the gate design shown above. Also determine the number of switches used in its implementation.
OUTx = (^) A + B +( B โ
C +( C + D + E ))
OUTy = (^) ( B โ
C +( C + D + E ))โ
( C + D + E )
switches = 3x6 + 2x8 + 9x2 = 52
Part B (10 points) Reimplement the behavior with a mixed logic design style using only NAND gates and inverters. Determine the number of switches used in this implementation.
D
E
C
B
OUTy
OUTx
A
switches = 3x4 + 2x6 + 5x2 = 34
Part C (10 points) Implement the following expression using only NOR gates and inverters. Then determine the number of switches required. Use proper mixed logic notation. Do not modify the expression. Optimize common subexpressions. Do not assume complements of inputs are available.
Out (^) z = ( D โ
E )โ
( F + G )โ
( F + G )
D
E
F
G
OUTz
switches = 4x4 + 3x2 = 22
4 problems, 5 pages Exam One Solutions 5 February 2004
Problem 4 (2 parts, 16 points) Building Blocks
Part A (8 points) Implement a 2 to 4 decoder using only AND gates. Assume inputs signals IN 0 , IN 1 , and En and their complements are available. Label all inputs and outputs.
In 1 In 0 En In 1 In 0 En In (^1) In 0 En In 1 In 0 En
O 3 O 2 O 1 O 0
Part B (8 points) Consider a priority encoder with the following behavior:
In 3 In 2 In 1 In 0 O 1 O 0 Valid 0 0 0 0 X X 0 0 0 0 1 0 0 1 0 0 1 0 0 1 1 0 0 1 1 0 0 1 0 1 0 0 1 0 1 0 1 0 1 1 0 1 0 1 1 0 1 0 1 0 1 1 1 1 0 1 1 0 0 0 1 1 1 1 0 0 1 0 0 1 1 0 1 0 1 1 1 1 0 1 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 0 1 1 1 1 0 1 0 1 1 1 1 1 1 0 1
List the inputs (In 0 , In 1 , In 2 , and In 3 ) in increasing priority.
In (^1) < In (^3) < In (^0) < In 2 lowest priority 2 nd^ lowest priority 2 nd^ highest priority highest priority
