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Central Processing Unit (MSP
CPU)
Pedro Dinis
AntĆ³nio EspĆrito Santo
Bruno Ribeiro
This work is produced by The Connexions Project and licensed under the Creative Commons Attribution License ā
1 Central Processing Unit (MSP430 CPU)
The RISC type architecture of the CPU is based on a short instruction set (27 instructions), interconnected by a 3-stage instruction pipeline for instruction decoding. The CPU has a 16-bit ALU, four dedicated registers and twelve working registers, which makes the MSP430 a high performance microcontroller suitable for low power applications. The addition of twelve working general purpose registers saves CPU cycles by allowing the storage of frequently used values and variables instead of using RAM. The orthogonal instruction set allows the use of any addressing mode for any instruction, which makes programming clear and consistent, with few exceptions, increasing the compiler e ciency for high-level languages such as C.
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MSP430 CPU block diagram.
Figure 1
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7 SCG1 System clock generator 0.SCG = 1 ā DCO generator is turned o if not used for MCLK or SM- CLK. 6 SCG0 System clock generator 1.SCG = 1 ā FLL+ loop control is turned o. 5 OSCOFF Oscillator O.OSCOFF = 1 ā turns o LFXT1 when it is not used for MCLK or SMCLK. 4 CPUOFF CPU o.CPUOFF = 1 ā disable CPU core. 3 GIE General interrupt enable.GIE = 1 ā enables maskable interrupts. 2 N Negative ag.N = 1 ā result of a byte or word operation is nega- tive. 1 Z Zero ag.Z = 1 ā result of a byte or word operation is 0. 0 C Carry ag.C = 1 ā result of a byte or word operation produced a carry.
Table 2
R2/R3: Constant Generator Registers (CG1/CG2) Depending of the source-register addressing modes (As) value, six commonly used constants can be generated without a code word or code memory access to retrieve them. This is a very powerful feature, which allows the implementation of emulated instructions, for example, instead of implementing a core instruction for an increment, the constant generator is used.
Register As Constant Remarks R2 00 - Register mode R2 01 (0) Absolute mode R2 10 00004h +4, bit processing R2 11 00008h +8, bit processing R3 00 00000h 0, word processing R3 01 00001h + R3 10 00002h +2, bit processing R3 11 0FFFFh -1, word processing
Table 3
1.2.4 R4 - R15: GeneralPurpose Registers
These general-purpose registers are used to store data values, address pointers, or index values and can be accessed with byte or word instructions. Request the MSP430 Teaching ROM Materials here https://www-a.ti.com/apps/dspuniv/teaching_rom_request.asp^1
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