Components Identified - Computer Engineering - Solved Exam, Exams of Computer Science

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ECE 2030

Section E

Midterm II - Solutions

October 27

th

1. Implement the following truth table using the components identified below

A B C F 0 0 0 0 0 0 1 1 0 1 0 1 0 1 1 0 1 0 0 1 1 0 1 1 1 1 0 0 1 1 1 0

a) A 3-8 decoder & gates. Clearly label the inputs and outputs of the decoder.

b) A 4-1 multiplexor & gates. Clearly label the inputs and outputs of the multiplexor.

Decoder

C

B

A

F

MUX

F

A B C

3. Implement the following expression in the PLA shown by identifying the connections

which should be made with an X and setting the value of the ex-or gate input.

F  ABC  AC  B

A B C

4. What size decoder will be used in a 16 word by 24 bit ROM (number of inputs and

number of outputs)?

A 4:16 Sized Decoder will be used.

5. Fill in the following table

Hexadecimal Octal Binary Base 10

A.B 12.54 1010.1011 10.

1.6 1.3 1.011 1.

6. Provide the hexadecimal value of the double precision floating point representation of

0x402D

8. (10 pts) Consider the following 4 bit 2’s complement adder/subtractor. (FA = Full

adder, 2:1 = 2:1 Mux)

a. What is the value of the output when A = 0100, B= 0010 and C_in = 1?

R= 0010 C-out= 1

b. How can you add logic (gates) to the above design, and operate the design so that it will generate a signal with a value of 1 if A ≥ B?

F  R 3 C In

R

F

C

9. Fill in the waveform below. Ignore propagation delays.

Reg

Reg

Reg

A

B C

D