Computer Architecture: Instruction Formats and Memory Traffic Analysis, Lecture notes of Computer Architecture and Organization

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Instructions Formats

Outline

 IAS Instruction set

 Instruction Set:

 Characteristics and Functions

IAS Instruction set (continued)

Problem

Write an appropriate assembly language code for the

following operation and interpret to Von Neumann IAS

architecture

X=Y*Z

// Where X->40 bit data and Y->40 bit data

Result would be more than 40 bit.

IAS Computer

MARPC

MBRM[MAR]

IRMBR<0..7>

MARMBR<8..19>

IBRMBR<20..39>

ACMBR

MBRM[MAR]

IRIBR<0..7>

MARIBR<8..19>

MBRM[MAR]

ACAC + MBR

PCPC+

MARPC MBRM[MAR]

IRMBR<0..7>

MARMBR<8..19>

IBRMBR<20..39>

M[MAR}MBR

MBRAC

IRIBR<0..7>

AC MQ

IBR PC = 1

IR MAR = 1

MEMORY

**1. LOAD M(X) 500, ADD M(X) 501

2. STOR M(X) 500, (Other Ins) .....
3. 3
4. 4**

PC

MBR IR IBR

MAR

1 1 LOAD M(X) 500, ADD M(X) 501

AC

ADD M(X) 501

LOAD M(X)

500 3 ADD M(X)

501

2

4

2 STOR M(X) 500, (Other Ins)

(Other Ins)

STOR M(X)

500

37

MBR

Mar ← PC

add = 1

LOAD M(X) 500, ADD M(X) 501

LOAD M(X) ADD M(X) 501 (^500)

MAR = add = 500

MBR = 3

3

AC = 3

Add M(X)^501

MAR = 501 add = 501

PC = 2

4

MBR = 4

AC = 7

MAR ←PC

MAR = 2

add = 2

STOR M(X) 500, (Other Ins)

(Other Ins) STOR M(X)

500

MAR = 500

Computer Components:

Top Level View

Instruction Cycle

• The IAS operates repetitively performing an instruction

cycle.

• Each instruction cycle consists of Two subcycles.
• Two steps:
  • Fetch
  • Execute

Execute Cycle

• Processor-memory
  • data transfer between CPU and main memory
• Processor- I/O
  • Data transfer between CPU and I/O module
• Data processing
  • Some arithmetic or logical operation on data
• Control
  • Alteration of sequence of operations
  • e.g. jump
• Combination of above

Instruction Cycle State Diagram

Characteristics of Hypothetical Machine

Characteristics of Hypothetical Machine

(cont..)

 The processor contains a single data register called an

accumulator (AC). Both instructions and data are 16 bits

long. Thus it is convenient to organize memory using 16

bit words.

 The instruction format provides 4 bits for the opcode, so

that there can be as many as 2

=16 different opcodes,

and upto 2^12 = 4096(4K) words of memory can be

directly addressed.

Instruction

 Definition:

 Instruction is a statement by which the operation

of CPU is determined.

 These instructions referred as “ Machine instructions or

computer Instructions”

 The collection of different instructions that the CPU can

execute is referred to as the CPU’s instruction set.

What must an instruction

set specify…?