INSTRUCTION TYPES AND FORMATS, Assignments of Computer science

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Instruction types and Formats

Instruction formats,

addressing modes,

2

Central Processing Unit

Instruction Formats

• (^) The bits of the instruction are divided into groups called fields.
• (^) The most common fields founded in the instruction formats

are:

 1. An operation code field

 2. An address field.

 3. A mode field (Addressing modes, next Sec)

• (^) Data executed by instructions (operands) are stored either in

memory or in processor registers.

• (^) Operands residing in memory are specified by their memory

address.

• (^) Operands residing in registers are specified with a register

address.

4

Central Processing Unit

Instruction Formats

• (^) Example: the influence of the number of addresses on the way

of evaluating this arithmetic statement using different:

X= (A+B)*(C+D)

• (^) 3-address instructions:
• (^) 2-address instructions:
• (^) 1-address instructions:
• (^) Zero-address instructions:

Instruction Representations

• (^) Each instruction is represented by sequence of bits
• (^) The instruction is divided into two fields
  • (^) Opcode field
  • (^) Operand field
• (^) This operand field further divided into one to four fields.
• (^) This layout of the instruction is known as the “Instruction

Format”

• (^) Simple instruction format Opcode Operand Address Operand Address Result Address Next Instruction

• (^) Based on number of operand address in the instruction. - (^) 4 Address Instruction - (^) 3 Address Instruction - (^) 2 Address Instruction - (^) 1 Address Instruction - (^) 0 Address Instruction

How to Evaluate the Arithmetic statement in ZERO,ONE,TWO,THREE Address

• (^) SYMBOLS- ADD,SUB,MUL,DIV for arithmetic operations
• (^) MOVE –for Transfer type Operation
• (^) LOAD and STORE for transfers to and from Memory and AC registers

Two Address Instruction

• Move Instruction

Moves or transfers

the operands to

and from memory

And processor

Registers

One Address Instruction

• USES AC

Accumulator reg

AC <- M[A]

AC <- AC+ M[B]

M[T]<- AC

AC <- M [C]

AC<- AC+ M[D]

AC <- AC * M[T]

M[X]<- AC

T -Temporary Location

Assumptions

24-bit memory address (3 bytes)

128 instructions (7 bits rounded to 1 byte)

Calculation of Memory traffic

4- Address Instruction 24 Bits / 3 Bytes Memory Op Code ResAddr Op1Addr Op2Addr NextiAddr 8 24 24 24 24

CPU Op Code ResAddr Op1Add r Op2Addr (^) NextiAdd r Op Op Resop Example: add M1,M2,M3, nexti M(1)M(2)+M(3) Memory Required to Encode an Instruction: 1Byte+ 4 x 3 bytes = 13 Bytes Calculation of Memory Accesses To fetch Instruction itself (^) Opcode= Op1Addr=1 1 Op2Addr= ResAddr= NextiAddr= Total= To Execute an Instruction Op1= Op2= Res= Total= Total Memory Traffic= No. of M/A to fetch + No. of M/A to ExecuteTotal Memory Traffic= 5 + 3 =

3- Address Instruction

24 Bits / 3 Bytes Memory Op Code ResAddr Op1Addr Op2Addr 8 24 24 24

CPU Op Code ResAddr Op1Add r Op2Addr Op Op Resop Example: add M1,M2,M M(1)M(2)+M(3) Memory Required to Encode an Instruction: 1Byte+ 3 x 3 bytes = 10 Bytes Calculation of Memory Accesses To fetch Instruction itself (^) Opcode= Op1Addr=1 1 Op2Addr= ResAddr= Total= To Execute an Instruction Op1= Op2= Res= Total= Total Memory Traffic= No. of M/A to fetch + No. of M/A to ExecuteTotal Memory Traffic= 4+ 3 = PC (^24)

• (^) 3-Address instruction:
  • (^) Address of next instruction kept in processor state register—the PC (Except for explicit Branches/Jumps)
  • (^) Rest of addresses in instruction
  • (^) This Instruction will require 3X3+1= 10 bytes to encode a 3-address ALU instruction. The number of memory access are required for a 3-address instruction:
  • (^) Four words will be transferred to the CPU when the instruction itself is fetched.= 4
  • (^) Then the two words representing the operands themselves need to be fetched into the CPU = 2
  • (^) And after the addition has been performed, the result needs to be written back to memory = 1

Total =

• (^) 2-address Instruction :
  • (^) Result overwrites Operand 2
  • (^) Needs only 2 addresses in instruction but less choice in placing data
  • (^) This Instruction will require 2X3+1= 7 bytes to encode a 2-address ALU instruction. The number of memory access are required for a 2-address instruction:
  • (^) Three words will be transferred to the CPU when the instruction itself

is fetched. = 3

• (^) Then the two words representing the operands themselves need to be fetched into he CPU and after the addition has been performed, Result overwrites Operand =
• (^) Total= 06
• (^) add Op1Addr Op2Addr

1- Address Instruction

24 Bits / 3 Bytes Memory Op Code Op1Addr 8 24

CPU Op Code Op1Add r Op Op Resop Example: add M Memory Required to Encode an Instruction: 1Byte+ 1 x 3 bytes = 4Bytes Calculation of Memory Accesses To fetch Instruction itself (^) Opcode= Op1Addr=1 1 Total= To Execute an Instruction Op1= Total= Total Memory Traffic= No. of M/A to fetch + No. of M/A to ExecuteTotal Memory Traffic= 2+ 1 = PC (^24) Acc