Computer Organisation - Intel Architecture PDF Basic Architecture, Study notes of Computer Architecture and Organization

Detailed informtion about IA 16/32 Architecture, Historical perspective, Key feature of previous generations of IA-32 processors, Basic modes of operation, IA 32 Basic Architecture, Register model.

Typology: Study notes

2010/2011

Uploaded on 09/01/2011

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IA 16/32 Architecture
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IA 16/32 Architecture

Historical perspective

Intel’s 8086 and 8088 16-bit processors were

the predecessor of the IA-32 architecture

  • Developed in 1978, the 8086 sported a 16-bit

external data bus and a 1 MB addressing

capability (20 address lines)

  • Both the 8086 and 8088 introduced a 16 bit

segment register which pointed to a memory

segment of 64 KB

  • In 1982 Intel introduced the 286 processor,

and with it, the protected mode operation to

support virtual memory management

Historical perspective

With the advent of the Pentium

processor in 1993 Intel added a second

execution pipeline, doubled the cache,

used a MESI protocol to support a

more efficient write-back cache

Intel also introduced the APIC, and

support for multiple processors, in

particular support for a glue less two

processor system. A subsequent

stepping also introduced MMX

Key feature of previous generations of

IA-32 processors

Key feature of recent generations of IA-

32 processors

Key feature of recent generations of IA-

64 processors

IA 32

Basic Architecture

Register model

  • The IA-32 provides a number of general and

special-purpose registers

General Purpose Registers – a set of 8 registers

for storing operands and pointers. These are:

EAX, EBX, ECX, EDX, ESI, EDI, EBP, and ESP

Segment Registers – provide 6 segment

registers

EFLAGS Register – Status and Control register

EIP Register – The 32-bit Instruction Pointer,

pointing to the next instruction to be executed

General Purpose Register names

General Purpose Registers

EAX – Accumulator

EBX – Pointer to data in the DS segment

ECX – Counter for string/loop operations

EDX – I/O Pointer

ESI – Source pointer for string

operations

EDI – Destination pointer for string

operations

ESP – Stack Pointer

EBP – Pointer to data on stack

Flag

Register

Flag bits

  • CF (bit 0) Carry flag — Set if an arithmetic operation generates a

carry or a borrow out of the most-significant bit of the result; cleared

otherwise. This flag indicates an overflow condition for unsigned-

integer arithmetic. It is also used in multiple-precision arithmetic.

  • Parity flag — Set if the least-significant byte of the result contains an

even number of 1 bits; cleared otherwise.

  • Zero flag — Set if the result is zero; cleared otherwise.
  • Sign flag — Set equal to the most-significant bit of the result, which

is the sign bit of a signed integer. (0 indicates a positive value and 1

indicates a negative value.)

  • Overflow flag — Set if the integer result is too large a positive

number or too small a negative number (excluding the sign-bit) to fit

in the destination operand; cleared otherwise. This flag indicates an

overflow condition for signed-integer (two’s complement) arithmetic.

Byte Order

Little Endian

  • Big Endian

IA 32 Instruction set

Data transfer

MOV, PUSH, POP

  • Binary arithmetic

ADD, ADC, SUB, IMUL, MUL, IDIV, DIV,

ONC, DEC, CMP

  • Logical Operation

AND, OR, XOR, NOT

  • Shift and rotate

SAR, SAL, SHR, SHL, ROR, ROL