ECE 2030 H Computer Engineering Spring 2004
4 problems, 5 pages Exam Three Solutions 15 April 2004
1
Problem 1 (3 parts, 35 points) Memory Systems
The following three parts consider memory systems built using a 1MByte DRAM organized as 2 million
addresses of 4-bit words.
Part A (8 points) Consider a memory system organized as 16 million addresses of 64-bit words.
number of chips needed in one bank 64/4 = 16 chips/bank
number of banks for memory system 16/2 = 8 banks
number of memory system address bits log(16M) = log(224) = 24 bits
memory decoder required (n to m) 3-to-8
number of DRAM chips required 16chips/bank x 8 banks = 128 chips
memory system capacity (in MBytes) 128 chips x 1MB/chip = 128 MBytes
Part B (8 points) Consider a memory system with 32 DRAM chips total and a 2-to-4 memory decoder.
number of banks 4 banks
number of chips used in one bank 32chips/4 banks = 8 chips/bank
number of addresses 4 x 2M = 8M addresses
word size (in bits) 8 x 4 = 32 bits
memory system capacity (in MBytes) 32 chips x 1MB/chip = 32 MBytes
Part C (19 points) Design a 4 million address by 8 bit memory system with four 2M x 4 memory chips.
Label all busses and indicate bit width. Assume R/W is connected and not shown here. Use a decoder if
necessary.
2M x 4
D0
D1
D2
D3
ADDR
CS
2M x 4
D0
D1
D2
D3
ADDR
CS
2M x 4
D0
D1
D2
D3
ADDR
CS
ADDR
22
MSEL
D0
D1
D2
D3
2M x 4
D0
D1
D2
D3
ADDR
CS
D4
D5
D6
D7
1 to 2
decoder
S
EN
O0
O1
21
A21
A20:0
21
21
21
21
