Exam Three for ECE 2030 G Computer Engineering Spring 2002, Exams of Computer Science

The solutions to exam three for the computer engineering course ece 2030 g held in spring 2002. The exam covers topics such as memory systems, instruction formats, datapath elements, and microcode. Students are required to determine the number of chips and capacity of memory systems, identify shift types and counts, and write microinstructions for various operations.

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ECE 2030 G Computer Engineering Spring 2002
4 problems, 5 pages Exam Three 18 April 2002
1
Problem 1 (3 parts, 25 points) Memory Systems
Imagine using a 4 Mbit DRAM organized as 1 million addresses of 4-bit words to build three
memory systems. The following three parts consider memory systems built using this chip.
Part A (10 points) Consider a memory system organized as 16 million addresses of 8-bit words.
number of chips needed in one bank 8-bit word/bank = 2chips/bank
4-bit word/chip
number of banks for memory system 16M/1M = 16 banks
memory decoder required (n to m)4-to-16 decoder
number of DRAM chips required 2chips/bank * 16 banks = 32 chips
capacity (in Mbits) 32*4Mbit = 128 Mbit
Part B (10 points) Consider a memory system organized as 1 million addresses of 32-bit words.
number of chips needed in one bank 32-bit word/bank = 8 chips/bank
4-bit word/chip
number of banks for memory system 1M/1M = 1 bank
memory decoder required (n to m)no decoder is necessary
number of DRAM chips required 8 chips/bank * 1 bank = 8 chips
capacity (in Mbits) 8*4Mbit = 32 Mbit
Part C (5 points) Consider a memory systems with 4 chips per bank and 2 banks.
number of addresses 1M addresses/bank*2banks = 2M addresses
size of a word 4 chips/word * 4 bits/chip = 16 bits/word
capacity (in Mbits) 4chips/bank*2banks*4Mbits/chip = 32Mbits
Problem 2 (1 part, 15 points) Instruction Formats
Suppose a datapath has three operand busses (two source, one destination), 70 instruction types,
and 128 registers where each register is 64 bits wide. Immediate operands can be in the range of
±16K. Determine the minimum number of bits needed for the following fields of instruction
formats for this data path.
bits needed to specify an opcode 64 < 70 < 128, so 7 bits needed
bits needed to specify a register operand log2(128) = 7 bits
bits needed to specify an immediate operand ±16K=±214, so 15 bits needed
bits needed to specify an R-type instruction 7 + 7 + 7 + 7 = 28 bits
bits needed to specify an I-type instruction 7 + 7 + 7 + 15 = 36 bits
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4 problems, 5 pages Exam Three 18 April 2002

Problem 1 (3 parts, 25 points) Memory Systems

Imagine using a 4 Mbit DRAM organized as 1 million addresses of 4-bit words to build three memory systems. The following three parts consider memory systems built using this chip.

Part A (10 points) Consider a memory system organized as 16 million addresses of 8-bit words.

number of chips needed in one bank 8-bit word/bank = 2chips/bank 4-bit word/chip number of banks for memory system (^) 16M/1M = 16 banks

memory decoder required ( n to m ) 4-to-16 decoder number of DRAM chips required 2chips/bank * 16 banks = 32 chips capacity (in Mbits) (^) 324Mbit = 128 Mbit*

Part B (10 points) Consider a memory system organized as 1 million addresses of 32-bit words.

number of chips needed in one bank 32-bit word/bank = 8 chips/bank 4-bit word/chip number of banks for memory system 1M/1M = 1 bank memory decoder required ( n to m ) no decoder is necessary

number of DRAM chips required 8 chips/bank * 1 bank = 8 chips capacity (in Mbits) 84Mbit = 32 Mbit*

Part C (5 points) Consider a memory systems with 4 chips per bank and 2 banks.

number of addresses 1M addresses/bank2banks = 2M addresses*

size of a word 4 chips/word * 4 bits/chip = 16 bits/word capacity (in Mbits) 4chips/bank2banks4Mbits/chip = 32Mbits**

Problem 2 (1 part, 15 points) Instruction Formats

Suppose a datapath has three operand busses (two source, one destination), 70 instruction types, and 128 registers where each register is 64 bits wide. Immediate operands can be in the range of ±16K. Determine the minimum number of bits needed for the following fields of instruction formats for this data path.

bits needed to specify an opcode 64 < 70 < 128, so 7 bits needed

bits needed to specify a register operand log 2 (128) = 7 bits

bits needed to specify an immediate operand (^) ± 16K= ± 214 , so 15 bits needed

bits needed to specify an R-type instruction 7 + 7 + 7 + 7 = 28 bits

bits needed to specify an I-type instruction 7 + 7 + 7 + 15 = 36 bits

4 problems, 5 pages Exam Three 18 April 2002

Problem 3 (2 parts, 30 points) Datapath Elements

Part A (20 points) Suppose the eight bit word below is given as input to a shifter. For each result listed below, determine the shift type and count that would give that result (assume the shifter is given the same input value on each line). Assume the shifter word width is eight bits.

Input Value: 1 1 0 0 1 0 1

Shift type Count Result

Rotate -2 0 0 1 0 1 0 1 1

Arithmetic +3 1 1 1 1 1 0 0 1

Logical +2 0 0 1 1 0 0 1 0

Logical/ Arithmetic

Rotate -1 1 0 0 1 0 1 0 1

Part B (10 points) Assuming X controls S0 and Y controls S1, determine the input values (LF 3 - LF 0 ) that should be given to the logical unit multiplexer to produce the logical functions below.

X Y out 0 0 LF 0 1 0 LF 1 0 1 LF 2 1 1 LF 3

LF 3 LF 2 LF 1 LF 0 Logical Function

0 1 1 1 NAND

0 1 1 0 XOR

1 1 1 0 OR

1 0 0 0 AND