Data Sheet Stuy-Microprocessors-Assignment, Exercises of Microprocessors

Assignment for Microprocessors course. Assigned by Prof. Purumitra Negi at Birla Institute of Technology and Science. It includes: Microprocessor, Characteristics, Waveforms, Setup, Hold, 74AHC74, 74AHCT373, Synchronous, Circuit, Flip, Flop, Gates

Typology: Exercises

2011/2012

Uploaded on 07/31/2012

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  • MMICROPROCESSORR ASSSIGNMMENT #
    • 9/5/2

Task:

Study datasheet of 74AHC74 (D-Flip Flop) and 74HCT373 (D-Latch) particularly AC characteristics and AC waveforms showing setup and hold times.

What is the essential difference between the two? One paragraph in your own words with an example of each is required.

Essential Difference:

74AHC74 and 74AHCT373, both are high speed CMOS devices, but 74AHC74 is D-Flip Flop and 74HCT373 is D-Latch.

74AHC

The D-Flip Flop used in 74AHC74 is a synchronous circuit that needs only a single data input. A low CLK disables the AND gates and prevents the Flip Flop from changing states. But, when CLK is high, a high D sets the Flip Flop, while a low D resets it.

CLK D Q

0 X Last State 1 0 0 1 1 1

74AHCT

A D latch is a kind of bistable multivibrator, i.e. it has two stable states and therefore can store one bit information. It has a single data input and an Enable signal or CLK. Its output depends not only on the current input but also on the previous inputs.

When the Enable signal is high, the signal would travel directly through the circuit, from input D to the output Q.

Clocked D flip flop

Symbol for Clocked D flip flop

74AHCT

The data given for the AC characteristics of 74AHCT373 is:

tsu Set-up time nD to nCP 13 ns th Hold-time nD to nCP 5 ns

*Vcc = 5 V

And the respective AC waveform is:

The above statistics and the wave forms show that 74AHC74 has a very less set-up time as compared to 74AHCT373 similarly the hold-time for 74AHC74 is less than 74AHCT373.

This shows the edge triggering in 74AHC74 and the level triggering in 74AHCT373. i.e D Flip flop responds only when the clock is in transition between its two voltage states, i.e. edge triggering. Whereas, in case of D latch the output follows the input if the latch is enabled. Otherwise it retains the value of the previous output.

Hence 74AHC74 is quick in taking in the data and switching the internal transistors as compared to 74AHCT373, because it is edge triggered instead of level triggered.