Digital Design using verilog, Study Guides, Projects, Research of Electronics

An Embedded Systems approach using Verilog for Xilinx Artix7 Basys3 FPGA.

Typology: Study Guides, Projects, Research

2016/2017

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In Praise of Digital Design: An Embedded

Systems Approach Using Verilog

“Peter Ashenden is leading the way towards a new curriculum for educating the next generation of digital logic designers. Recognizing that digital design has moved from being gate-centric assembly of custom logic to processor-centric design of embedded systems, Dr. Ashenden has shifted the focus from the gate to the modern design and integration of complex integrated devices that may be physically realized in a variety of forms. Dr. Ashenden does not ignore the fundamentals, but treats them with suitable depth and breadth to provide a basis for the higher-level material. As is the norm in all of Dr. Ashenden’s writing, the text is lucid and a pleasure to read. The book is illustrated with copious examples and the companion Web site offers all that one would expect in a text of such high quality.”

— g r a n t m a r t i n , Chief Scientist, Tensilica Inc.

“Dr. Ashenden has written a textbook that enables students to obtain a much broader and more valuable understanding of modern digital system design. Readers can be sure that the practices described in this book will provide a strong foundation for modern digital system design using hard- ware description languages.”

— g a ry s p i v e y, George Fox University

“The convergence of miniaturized, sophisticated electronics into handheld, low-power embedded systems such as cell phones, PDAs, and MP3 players depends on efficient, digital design flows. Starting with an intuitive explo- ration of the basic building blocks, Digital Design: An Embedded Systems Approach introduces digital systems design in the context of embedded systems to provide students with broader perspectives. Throughout the text, Peter Ashenden’s practical approach engages students in understand- ing the challenges and complexities involved in implementing embedded systems.”

— g r e g o ry d. p e t e r s o n , University of Tennessee

Digital Design: An Embedded Systems Approach places emphasis on larger systems containing processors, memory, and involving the design

Digital Design

An Embedded Systems Approach

Using Verilog

a b o u t t h e a u t h o r

Peter J. Ashenden is an Adjunct Associate Professor at Adelaide University and the founder of Ashenden Designs, a consulting business specializing in electronics design automation (EDA). From 1990 to 2000, Dr. Ashenden was a member of the faculty in the Department of Computer Science at Adelaide. He developed curriculum and taught in a number of areas for both the Computer Sci- ence and the Electrical and Electronic Engineering departments. Topics included computer organization, computer architecture, digital logic design, programming and algorithms, at all levels from undergraduate to graduate courses. He was also actively involved in academic administra- tion at many levels within the university. In 2000, Dr. Ashenden established Ashenden Designs. His services include training development and delivery, advising on design methodology, research in EDA tool technology, development of design languages, and standards writing. His clients include industry and government organiza- tion in the United States, Europe and SE Asia. Since 1992, Dr. Ashenden has been involved in the IEEE VHDL standards committees, and continues to play a major role in ongoing development of the language. From 2003 to 2005 he was Chair of the IEEE Design Automation Standards Committee, which oversees development of all IEEE standards in EDA. He is currently Technical Editor for the VHDL, VHDL-AMS, and Rosetta specification language standards. In addition to his research publications, Dr. Ashenden is author of The Designer’s Guide to VHDL and The Student’s Guide to VHDL , and coauthor of The System Designer’s Guide to VHSL-AMS and VHDL-2007: Just the New Stuff. His VHDL books are highly regarded and are the best-selling references on the subject. From 2000 to 2004, he was Series Coeditor of the Morgan Kaufmann Series on Systems on Silicon, and from 2001 to 2004 he was a member of the Editorial Board of IEEE Design and Test of Computers magazine. Dr. Ashenden is a Senior Member of the IEEE and the IEEE Computer Society. He is also a volunteer Senior Firefighter of 12 years standing with the South Australian Country Fire Service.

Publishing Director Joanne Tracy Publisher Denise E. M. Penrose Acquisitions Editor Charles Glaser Publishing Services Manager George Morrison Senior Production Editor Dawnmarie Simpson Developmental Editor Nate McFadden Editorial Assistant Kimberlee Honjo Production Assistant Lianne Hong Cover Design Eric DeCicco Cover Image Corbis Composition diacriTech Technical Illustration Peter Ashenden Copyeditor JC Publishing Proofreader Janet Cocker Indexer Joan Green Interior printer Sheridan Books, Inc. Cover printer Phoenix Color, Inc.

Morgan Kaufmann Publishers is an imprint of Elsevier. 30 Corporate Drive, Suite 400, Burlington, MA 01803, USA

This book is printed on acid-free paper.

© 2008 by Elsevier Inc. All rights reserved.

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Library of Congress Cataloging-in-Publication Data Ashenden, Peter J. Digital design: an embedded systems approach using Verilog / Peter J. Ashenden. p. cm. Includes index. ISBN 978-0-12-369527-7 (pbk. : alk. paper) 1. Embedded computer systems. 2. Verilog (Computer hardware description language) 3. System design. I. Title. TK7895.E42.A68 2007 621.39'16–dc 2007023242

ISBN: 978-0-12-369527-

For information on all Morgan Kaufmann publications, visit our Web site at www.mkp.com or www.books.elsevier.com

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To my daughter, Eleanor — pa

ix

c o n t e n t s

  • c h a p t e r 1 Introduction and Methodology Preface xv
  • 1.1 Digital Systems and Embedded Systems
  • 1.2 Binary Representation and Circuit Elements
  • 1.3 Real-World Circuits
    • 1.3.1 Integrated Circuits
    • 1.3.2 Logic Levels
    • 1.3.3 Static Load Levels
    • 1.3.4 Capacitive Load and Propagation Delay
    • 1.3.5 Wire Delay
    • 1.3.6 Sequential Timing
    • 1.3.7 Power
    • 1.3.8 Area and Packaging
  • 1.4 Models
  • 1.5 Design Methodology
    • 1.5.1 Embedded Systems Design
  • 1.6 Chapter Summary
  • 1.7 Further Reading
    • Exercises
  • c h a p t e r 2 Combinational Basics
  • 2.1 Boolean Functions and Boolean Algebra
    • 2.1.1 Boolean Functions
    • 2.1.2 Boolean Algebra
    • 2.1.3 Verilog Models of Boolean Equations
  • 2.2 Binary Coding
    • 2.2.1 Using Vectors for Binary Codes
    • 2.2.2 Bit Errors
  • 2.3 Combinational Components and Circuits
    • 2.3.1 Decoders and Encoders
    • 2.3.2 Multiplexers
    • 2.3.3 Active-Low Logic
  • 2.4 Verification of Combinational Circuits
  • 2.5 Chapter Summary
  • 2.6 Further Reading
    • Exercises
  • c h a p t e r 3 Numeric Basics
  • 3.1 Unsigned Integers
    • 3.1.1 Coding Unsigned Integers
    • 3.1.2 Operations on Unsigned Integers
    • 3.1.3 Gray Codes
  • 3.2 Signed Integers
    • 3.2.1 Coding Signed Integers
    • 3.2.2 Operations on Signed Integers
  • 3.3 Fixed-Point Numbers
    • 3.3.1 Coding Fixed-Point Numbers
    • 3.3.2 Operations on Fixed-Point Numbers
  • 3.4 Floating-Point Numbers
    • 3.4.1 Coding Floating-Point Numbers
  • 3.5 Chapter Summary
  • 3.6 Further Reading
    • Exercises
  • c h a p t e r 4 Sequential Basics
  • 4.1 Storage Elements
    • 4.1.1 Flip-flops and Registers
    • 4.1.2 Shift Registers
    • 4.1.3 Latches
  • 4.2 Counters
  • 4.3 Sequential Datapaths and Control
    • 4.3.1 Finite-State Machines
  • 4.4 Clocked Synchronous Timing Methodology
    • 4.4.1 Asynchronous Inputs
    • 4.4.2 Verification of Sequential Circuits
    • 4.4.3 Asynchronous Timing Methodologies
  • 4.5 Chapter Summary
  • 4.6 Further Reading
    • Exercises
  • c h a p t e r 5 Memories
  • 5.1 General Concepts
  • 5.2 Memory Types
    • 5.2.1 Asynchronous Static RAM
    • 5.2.2 Synchronous Static RAM
    • 5.2.3 Multiport Memories
    • 5.2.4 Dynamic RAM
    • 5.2.5 Read-Only Memories
  • 5.3 Error Detection and Correction
  • 5.4 Chapter Summary
  • 5.5 Further Reading
    • Exercises
  • c h a p t e r 6 Implementation Fabrics
  • 6.1 Integrated Circuits
    • 6.1.1 Integrated Circuit Manufacture
    • 6.1.2 SSI and MSI Logic Families
    • 6.1.3 Application-Specific Integrated Circuits (ASICs)
  • 6.2 Programmable Logic Devices
    • 6.2.1 Programmable Array Logic
    • 6.2.2 Complex PLDs
    • 6.2.3 Field-Programmable Gate Arrays
  • 6.3 Packaging and Circuit Boards
  • 6.4 Interconnection and Signal Integrity
    • 6.4.1 Differential Signaling
  • 6.5 Chapter Summary
  • 6.6 Further Reading
    • Exercises
  • c h a p t e r 7 Processor Basics
  • 7.1 Embedded Computer Organization
    • 7.1.1 Microcontrollers and Processor Cores
  • 7.2 Instructions and Data
    • 7.2.1 The Gumnut Instruction Set
    • 7.2.2 The Gumnut Assembler
    • 7.2.3 Instruction Encoding
    • 7.2.4 Other CPU Instruction Sets
  • 7.3 Interfacing with Memory
    • 7.3.1 Cache Memory
  • 7.4 Chapter Summary
  • 7.5 Further Reading
    • Exercises
  • c h a p t e r 8 I/O Interfacing
  • 8.1 I/O Devices
    • 8.1.1 Input Devices
    • 8.1.2 Output Devices
  • 8.2 I/O Controllers
    • 8.2.1 Simple I/O Controllers
    • 8.2.2 Autonomous I/O Controllers
  • 8.3 Parallel Buses
    • 8.3.1 Multiplexed Buses
    • 8.3.2 Tristate Buses
    • 8.3.3 Open-Drain Buses
    • 8.3.4 Bus Protocols
  • 8.4 Serial Transmission
    • 8.4.1 Serial Transmission Techniques
    • 8.4.2 Serial Interface Standards
  • 8.5 I/O Software
    • 8.5.1 Polling
    • 8.5.2 Interrupts
    • 8.5.3 Timers
  • 8.6 Chapter Summary
  • 8.7 Further Reading
    • Exercises
  • c h a p t e r 9 Accelerators
  • 9.1 General Concepts
  • 9.2 Case Study: Video Edge-Detection
  • 9.3 Verifying an Accelerator
  • 9.4 Chapter Summary
  • 9.5 Further Reading
    • Exercises
  • c h a p t e r 1 0 Design Methodology
  • 10.1 Design Flow
    • 10.1.1 Architecture Exploration
    • 10.1.2 Functional Design
    • 10.1.3 Functional Verification
    • 10.1.4 Synthesis
    • 10.1.5 Physical Design
  • 10.2 Design Optimization
    • 10.2.1 Area Optimization
    • 10.2.2 Timing Optimization
    • 10.2.3 Power Optimization
  • 10.3 Design for Test
    • 10.3.1 Fault Models and Fault Simulation
    • 10.3.2 Scan Design and Boundary Scan
    • 10.3.3 Built-In Self Test (BIST)
  • 10.4 Nontechnical Issues
  • 10.5 In Conclusion
  • 10.6 Chapter Summary
  • 10.7 Further Reading
  • a p p e n d i x a Knowledge Test Quiz Answers
  • a p p e n d i x b Introduction to Electronic Circuits
  • B.1 Components
    • B.1.1 Voltage Sources
    • B.1.2 Resistors
    • B.1.3 Capacitors
    • B.1.4 Inductors
    • B.1.5 MOSFETs
    • B.1.6 Diodes
    • B.1.7 Bipolar Transistors
  • B.2 Circuits
    • B.2.1 Kirchhoff’s Laws
    • B.2.2 Series and Parallel R, C, and L
    • B.2.3 RC Circuits
    • B.2.4 RLC Circuits
  • B.3 Further Reading
  • a p p e n d i x c Verilog for Synthesis
  • C.1 Data Types and Operations
  • C.2 Combinational Functions
  • C.3 Sequential Circuits
    • C.3.1 Finite-State Machines
  • C.4 Memories
  • a p p e n d i x d The Gumnut Microcontroller Core
  • D.1 The Gumnut Instruction Set
    • D.1.1 Arithmetic and Logical Instructions
    • D.1.2 Shift Instructions
    • D.1.3 Memory and I/O Instructions
    • D.1.4 Branch Instructions
    • D.1.5 Jump Instructions
    • D.1.6 Miscellaneous Instructions
  • D.2 The Gumnut Bus Interface
  • Index

p r e f a c e

A P P R O A C H

This book provides a foundation in digital design for students in computer engineering, electrical engineering and computer science courses. It deals with digital design as an activity in a larger systems design context. Instead of focusing on gate-level design and aspects of digital design that have diminishing relevance in a real-world design context, the book concen- trates on modern and evolving knowledge and design skills. Most modern digital design practice involves design of embedded systems, using small microcontrollers, larger CPUs/DSPs, or hard or soft processor cores. Designs involve interfacing the processor or processors to memory, I/O devices and communications interfaces, and developing accelerators for operations that are too computationally intensive for pro- cessors. Target technologies include ASICs, FPGAs, PLDs and PCBs. This is a significant change from earlier design styles, which involved use of small-scale integrated (SSI) and medium-scale integrated (MSI) circuits. In such systems, the primary design goal was to minimize gate count or IC package count. Since processors had lower performance and memories had limited capacity, a greater proportion of system functionality was implemented in hardware. While design practices and the design context have evolved, many text- books have not kept track. They continue to promote practices that are largely obsolete or that have been subsumed into computer-aided design (CAD) tools. They neglect many of the important considerations for mod- ern designers. This book addresses the shortfall by taking an approach that embodies modern design practice. The book presents the view that digital logic is a basic abstraction over analog electronic circuits. Like any abstrac- tion, the digital abstraction relies on assumptions being met and constraints being satisfied. Thus, the book includes discussion of the electrical and tim- ing properties of circuits, leading to an understanding of how they influence design at higher levels of abstraction. Also, the book teaches a methodology based on using abstraction to manage complexity, along with principles and methods for making design trade-offs. These intellectual tools allow students to track evolving design practice after they graduate. Perhaps the most noticeable difference between this book and its predecessors is the omission of material on Karnaugh maps and related

xv

logic optimization techniques. Some reviewers of the manuscript argued that such techniques are still of value and are a necessary foundation for students learning digital design. Certainly, it is important for students to understand that a given function can be implemented by a variety of equivalent circuits, and that different implementations may be more or less optimal under different constraints. This book takes the approach of presenting Boolean algebra as the foundation for gate-level circuit trans- formation, but leaves the details of algorithms for optimization to CAD tools. The complexity of modern systems makes it more important to raise the level of abstraction at which we work and to introduce embed- ded systems early in the curriculum. CAD tools perform a much better job of gate-level optimization than we can do manually, using advanced algorithms to satisfy relevant constraints. Techniques such as Karnaugh maps do have a place, for example, in design of specialized hazard-free logic circuits. Thus, students can defer learning about Karnaugh maps until an advanced course in VLSI, or indeed, until they encounter the need in industrial practice. A web search will reveal many sources describing the techniques in detail, including an excellent article in Wikipedia. The approach taken in this book makes it relevant to Computer Sci- ence courses, as well as to Computer Engineering and Electrical Engi- neering courses. By treating digital design as part of embedded systems design, the book will provide the understanding of hardware needed for computer science students to analyze and design systems comprising both hardware and software components. The principles of abstraction and complexity management using abstraction presented in the book are the same as those underlying much of computer science and software engineering. Modern digital design practice relies heavily on models expressed in hardware description languages (HDLs), such as Verilog and VHDL. HDL models are used for design entry at the abstract behavioral level and for refinements at the register transfer level. Synthesis tools produce gate-level HDL models for low-level verification. Designers also express verification environments in HDLs. This book emphasizes HDL-based design and verification at all levels of abstraction. The present version uses Verilog for this purpose. A second version, Digital Design: An Embedded Systems Approach Using VHDL, substitutes VHDL for the same purpose.

OVE RVI EW

For those who are musically inclined, the organization of this book can be likened to a two-act opera, complete with overture, intermezzo, and finale. Chapter 1 forms the overture, introducing the themes that are to fol- low in the rest of the work. It starts with a discussion of the basic ideas of the digital abstraction, and introduces the basic digital circuit elements.

xvi P R E FA C E

affect real-world physical properties. It describes a range of devices that are used in embedded computers and shows how they are accessed by an embedded processor and by embedded software. Chapter 9 describes accelerators, that is, components that can be added to embedded systems to perform operations faster than is possible with embedded software running on a processor core. This chapter uses an extended example to illustrate design considerations for accelerators, and shows how an accelerator interacts with an embedded processor. The finale, Chapter 10, is a coda that returns to the theme of design methodology introduced in Chapter 1. The chapter describes details of the design flow and discusses how aspects of the design can be optimized to better meet constraints. It also introduces the concept of design for test, and outlines some design for test tools and techniques. The opera finishes with a discussion of the larger context in which digital systems are designed. After a performance of an opera, there is always a lively discussion in the foyer. This book contains a number of appendices that correspond to that aspect of the opera. Appendix A provides sample answers for the Knowledge Test Quiz sections in the main chapters. Appendix B provides a quick refresher on electronic circuits. Appendix C is a summary of the subset of Verilog used for synthesis of digital circuits. Finally, Appendix D is an instruction-set reference for the Gumnut embedded processor core used in examples in Chapters 7 through 9. For those not inclined toward classical music, I apologize if the pre- ceding is not a helpful analogy. An analogy with the courses of a feast came to mind, but potential confusion among readers in different parts of the world over the terms appetizer, entrée and main course make the analogy problematic. The gastronomically inclined reader should feel free to find the correspondence in accordance with local custom.

COU RSE ORGAN I ZATION

This book covers the topics included in the Digital Logic knowledge area of the Computer Engineering Body of Knowledge described in the IEEE/ACM Curriculum Guidelines for Undergraduate Degree Programs in Computer Engineering. The book is appropriate for a course at the sophomore level, assuming only previous introductory courses in electronic circuits and com- puter programming. It articulates into junior and senior courses in embed- ded systems, computer organization, VLSI and other advanced topics. For a full sequence in digital design, the chapters of the book can be covered in order. Alternatively, a shorter sequence could draw on Chapter 1 through Chapter 6 plus Chapter 10. Such a sequence would defer material in Chapters 7 through 9 to a subsequent course on embedded systems design.

xviii P R E FA C E

For either sequence, the material in this book should be supplemented by a reference book on the Verilog language. The course work should also include laboratory projects, since hands-on design is the best way to reinforce the principles presented in the book.

WE B SU PPLE M E NTS

No textbook can be complete nowadays without supplementary material on a website. For this book, resources for students and instructors are available at the website:

textbooks.elsevier.com/

For students, the website contains:

Source code for all of the example HDL models in the book Tutorials on the VHDL and Verilog hardware description languages An assembler for the Gumnut processor described in Chapter 7 and Appendix D A link to the ISE WebPack FPGA EDA tool suite from Xilinx A link to the ModelSim Xilinx Edition III VHDL and Verilog simula- tor from Mentor Graphics Corporation A link to an evaluation edition of the Synplify Pro PFGA synthesis tool from Synplicity, Inc. (see inside back cover for more details). Tutorials on use of the EDA tools for design projects

For instructors, the website contains a protected area with additional resources:

An instructor’s manual Suggested lab projects Lecture notes Figures from the text in JPG and PPT formats

Instructors are invited to contribute additional material for the benefit of their colleagues. Despite the best efforts of all involved, some errors have no doubt crept through the review and editorial process. A list of detected errors will be available accumulated on the website mentioned above. Should you detect such an error, please check whether it has been previously recorded. If not, I would be grateful for notice by email to

[email protected]

          

P R E FA C E xix