Digital Logic Design Midterm Exam: Questions and Answers | Exams Analysis and Design of Digital Integrated Circuits

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Question 1: Multiple Choices

1. Covert the following bit pattern (𝟏𝟏𝟎.𝟎𝟏𝟏)2 to decimal number……….

(a) (5.𝟑𝟕𝟓)10 (b) (6.𝟑𝟕4)10 (c) (6.𝟑5𝟓)10 (d) (6.𝟑𝟕𝟓)10

2. Convert (11.6875)10 to binary number……………….

(a) (1011.1011)10 (b) (1101.1011) 10 (c) (1101.1101) 10 (d) None of these

3. Convert (AB)16 to octal number……………….

(a) (254)8 (b) (255)8 (c) (253)8 (d) None of these

4. Which is the coding system for data representation?

(a) ASCII (b) EBCDIC (c) Unicode (d) All of these

5. Unicode system uses …………….… to represent symbols.

(a) 1bits (b) 2 bits (c) 8bits (d)16 bits

6. Which of the following is a type of digital logic circuit?

(a) Combinational logic circuits (b) Sequential logic circuits (c) Both a & b (d) None of these

7. The following hexadecimal number (1E.43)16 is equivalent to...............

(a) (36.506)8 (b) (36.206)8 (c) (35.506)8 (d)(35.206)8

8. Convert (312)8 to decimal....... (a) (201)10 (b) (202)10 (c) (203)10 (d)(204)10

9. What is the addition of the binary number 101001+ 010011=?

(a) 010100 (b)111100 (c) 000111 (d) 101110

10. DeMorgan's Law states that

(a) (A+B)' = A'*B (b) (AB)' = A' + B' (c) (AB)' = A' + B (d) (AB)' = A + B

11. The number of inputs in a half adder is? (a) 8 (b) 2 (c) 11 (d) 32

12. Which gate is best used as a basic comparator?

(a) NOR (b) OR (c) Exclusive-OR (d) AND

13. A full-adder has a Cin = 0. What are the sum ( ) and the carry (Cout) when A = 1 and B = 1?

(a) = 0, Cout = 0 (b) = 0, Cout = 1 (c) = 1, Cout = 0 (d) = 1, Cout = 1

14. What type of logic circuit is represented by the figure shown?

(a) XOR (b) XNOR (c) XAND (d) XNAND

15. How many outputs would two 8-line-to-3-line encoders, expanded to

a 16-line-to-4-line encoder, have?

(a) 3 (b) 4 (c) 5 (d) 6

16. The number of digits in octal system is ………

(a) 8 (b) 7 (c) 9 (d)10

17. A full adder can be made out of …………

(a) two half adders (b) two half adders and a OR gate

18. The output of a half adder is ………....

(a) Sum (b) Sum and Carry (c) Carry (d)None of these

19. (0.1011)2 = ............ (a) 0.687510 (b) 0.680010 (c) 0.010010 (d) 0.500010

20. How many possible outputs would a decoder have with a 6-bit binary input?

(a) 16 (b) 32 (c) 64 (d) 128

21. How many inputs must a full-adder have? (a) 2 (b) 3 (c) 4 (d) 5

Beni-suef University

Faculty of Computers and AI

Subject: Digital Logic Design

Second Semester 2021 / 2022

MidTerm Exam

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Question 1: Multiple Choices

1. Covert the following bit pattern ( 𝟏𝟏𝟎. 𝟎𝟏𝟏 ) 2 to decimal number………. (a) (5.𝟑𝟕𝟓) 10 (b) (6.𝟑𝟕4) 10 (c) (6.𝟑 5 𝟓) 10 (d) (6.𝟑𝟕𝟓) (^10) 2. Convert (11.6875) 10 to binary number………………. (a) (1011.1011) 10 (b) (1101.1011) 10 (c) (1101.1101) 10 (d) None of these 3. Convert (AB) 16 to octal number………………. (a) (254) 8 (b) (255) 8 (c) (253) 8 (d) None of these 4. Which is the coding system for data representation? (a) ASCII (b) EBCDIC (c) Unicode (d) All of these 5. Unicode system uses …………….… to represent symbols. (a) 1bits (b) 2 bits (c) 8bits (d)16 bits 6. Which of the following is a type of digital logic circuit? (a) Combinational logic circuits (b) Sequential logic circuits (c) Both a & b (d) None of these 7. The following hexadecimal number (1E.43) 16 is equivalent to...............

(a) (36.506) 8 (b) (36.206) 8 (c) (35.506) 8 (d)(35.206) (^8)

8. Convert (312) 8 to decimal....... (a) (201) 10 (b) (202) 10 (c) (203) 10 (d)(204) (^10) 9. What is the addition of the binary number 101001+ 010011=?

(a) 010100 (b)111100 (c) 000111 (d) 101110

10. DeMorgan's Law states that

(a) (A+B)' = A'*B (b) (AB)' = A' + B' (c) (AB)' = A' + B (d) (AB)' = A + B

11. The number of inputs in a half adder is? (a) 8 (b) 2 (c) 11 (d) 32 12. Which gate is best used as a basic comparator? (a) NOR (b) OR (c) Exclusive-OR (d) AND 13. A full-adder has a Cin = 0. What are the sum ( ) and the carry (Cout) when A = 1 and B = 1? (a) = 0, Cout = 0 (b) = 0, Cout = 1 (c) = 1, Cout = 0 (d) = 1, Cout = 1 14. What type of logic circuit is represented by the figure shown?

(a) XOR (b) XNOR (c) XAND (d) XNAND

15. How many outputs would two 8-line-to-3-line encoders, expanded to a 16-line-to-4-line encoder, have? (a) 3 (b) 4 (c) 5 (d) 6 16. The number of digits in octal system is ……… (a) 8 (b) 7 (c) 9 (d) 17. A full adder can be made out of ………… (a) two half adders (b) two half adders and a OR gate (c) two half adders and a NOT gate (d) three half adders 18. The output of a half adder is ……….... (a) Sum (b) Sum and Carry (c) Carry (d)None of these 19. (0.1011) 2 = ............ (a) 0.687510 (b) 0.680010 (c) 0.0100 10 (d) 0. 20. How many possible outputs would a decoder have with a 6-bit binary input? (a) 16 (b) 32 (c) 64 (d) 128 21. How many inputs must a full-adder have? (a) 2 (b) 3 (c) 4 (d) 5

Beni-suef University Faculty of Computers and AI Subject: Digital Logic Design Second Semester 2021 / 2022 MidTerm Exam

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22. How many inputs are required for a 1-of-16 decoder? (a) 2 (b) 4 (c) 8 (d) 16 23. Which is the coding system for data representation? (a) ASCII (b) EBCDIC (c) Unicode (d) All of these 24. When converting an octal number to binary, you repeatedly divide by……………... (a) 2 (b) 8 (c) 10 (d) 16 25. The Simplification of the following Boolean expressions using Boolean algebra is (a) A+BC (b) AB+C (c)A+B+C (d) None of these 26. Simplify the following boolean expession using DeMorgan’ (a) AB�^ (C�D�) (b) AB�^ (C�^ + D�) (c) (A+B�) (C�^ D�) (d) None of these 27. The decimal equivalent of the bit pattern (0011100010) is……………… (a) (225) 10 (b) (226) 10 (c) (128) 10 (d) (224) (^10) 28. The Binary equivalent of the Decimal number (34) 10 is……………….. (a) (100010) 2 (b) (100110) 2 (c) (100001) 2 (d) (101010) (^2) 29. Covert the following bit pattern ( 𝟏𝟏𝟎. 𝟎𝟏𝟏 ) 2 to decimal number………. (a) (5.𝟑𝟕𝟓) 10 (b) (6.𝟑𝟕4) 10 (c) (6.𝟑 5 𝟓) 10 (d) (6.𝟑𝟕𝟓) (^10) 30. Convert (11.6875)10 to binary number………………. (a) (1011.1011) 10 (b) (1101.1011) 10 (c) (1101.1101) 10 (d) None of these 31. Convert (AB) 16 to octal number………………. (a) (254) 8 (b) (255) 8 (c) (253) 8 (d) None of these 32. How many entries will be in the truth table of a 4-input NAND gate? (a) 6 (b) 8 (c) 32 (d) 33. Suppose the output of an XNOR gate is 1. Which of the given input combination is correct? (a) A = 0, B' = 1 (b) A = 1, B = 1 (c) A = 0, B = 1 (d) A = 0, B = 0 34. To represent the word “LUCK” in Extended ASCII, how many bits we need ........... (a) 32 (b) 28 (c) 64 (d) None of these

Question 2: True and False

35. Smallest unit of data that can be stored in computer is called bit. (a) True (b) False 36. Bit terminology used to express the size of documents and other files, programs. (a) True (b) False 37. The octal no. system has a 8 digit and is based on power of 4. (a) True (b) False 38. The coding system for image can be represented by ASCII. (a) True (b) False 39. Video data are a set of sequential images. (a) True (b) False 40. XNOR gate produces a logic 1 output only if its two inputs are different. If the inputs are the same, the output is a logic 0. (a) True (b) False

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Digital Logic Design Midterm Exam: Questions and Answers, Exams of Analysis and Design of Digital Integrated Circuits

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Question 1: Multiple Choices

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