EE306 Course Outline, Lecture notes of Data Structures and Algorithms

The course outline for EE306, a course offered by the Department of Electrical and Computer Engineering at The University of Texas at Austin in Fall 2021. a schedule of lectures and discussion sessions, as well as topics covered in each lecture. The course covers topics such as the basics of computing, bits and operations on bits, basic logic structures, memory and finite state machines, and the Von Neumann model and the LC-3 ISA. The document also includes information on problem sets and programming labs, as well as exam dates.

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Department of Electrical and Computer Engineering
The University of Texas at Austin
EE 306, Fall, 2021
Yale Patt, Instructor
TAs: Sabee Grewal, Ali Fakhrzadehgan, Ying-Wei Wu, Michael Chen, Jason Math, Adeel Rehman
Course Outline
August 25, 2021
August 25: Lecture 1. OverviewofEE306.
--The computer -- a complexsystem organized in levels of interpretation.
--The computer -- a universal computational device; givenenough time
and space it can do anything anyother computational device does.
August 26,27: Discussion Session. Orientation to our computing environment, email, tools
August 30: Lecture 2: Chapter 1 (continued), Chapter 2: Bits and operations on bits.
-- The bit as a unit of information.
-- Encoding of bits: Binary numbers (integer data type, ASCII characters.
-- Negative numbers, 2’scomplement representation, sign-extension.
-- hexrepresentation of binary numbers.
-- Arithmetic operations on numbers. ADD, SUB. [Note that x+x = left shift]
-- Logical operations on bits. AND, OR, NOT.
September 1: Lecture 3. Bits and operations on bits (continued).
Discussion Session. Emphasis on Chapters 1,2, problem set 1.
September 6: Labor Day,noclass
September 8: Lecture 4. Chapter 2 (continued).
September 9,10: Discussion Session. Emphasis on Problem Set 1
Problem set 1, due beforeclass, September 13.
September 13: Lecture 5. Chapter 3: Basic Logic Structures
-- The transistor as a switch
-- Basic Gates (AND, OR, NOT)
-- Truth table representations
-- Anyarbitrary function can be built out of these gates
(no attempt at minimization. Just an awareness exercise)
-- full ADDER, MUX, DECODER
-- Basic storage element (Gated RS latch)
-- A register
September 15: Lecture 6. Memory and Finite State Machines
-- a logic circuit to implement a small piece of memory (perhaps 2**2 x 3)
-- concept of memory: address space, addressability
-- The notion of state (one of the most important concepts in engineering)
-- State diagram, Next State table, State Assignment
-- Implementation example: sequential machine
September 16,17: Discussion Session. Emphasis on Chapter 3, problem set 2
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Department of Electrical and Computer Engineering The University of Texas at Austin

EE 306, Fall, 2021 Yale Patt, Instructor TAs: Sabee Grewal, Ali Fakhrzadehgan, Ying-Wei Wu, Michael Chen, Jason Math, Adeel Rehman Course Outline August 25, 2021

August 25: Lecture 1. Overview of EE 306. --The computer -- a complex system organized in levels of interpretation. --The computer -- a universal computational device; given enough time and space it can do anything any other computational device does.

August 26,27: Discussion Session. Orientation to our computing environment, email, tools

August 30: Lecture 2: Chapter 1 (continued), Chapter 2: Bits and operations on bits. -- The bit as a unit of information. -- Encoding of bits: Binary numbers (integer data type, ASCII characters. -- Negative numbers, 2’s complement representation, sign-extension. -- hex representation of binary numbers. -- Arithmetic operations on numbers. ADD, SUB. [Note that x+x = left shift] -- Logical operations on bits. AND, OR, NOT.

September 1: Lecture 3. Bits and operations on bits (continued).

Discussion Session. Emphasis on Chapters 1,2, problem set 1.

September 6: Labor Day, no class

September 8: Lecture 4. Chapter 2 (continued).

September 9,10: Discussion Session. Emphasis on Problem Set 1

Problem set 1, due before class, September 13.

September 13: Lecture 5. Chapter 3: Basic Logic Structures -- The transistor as a switch -- Basic Gates (AND, OR, NOT) -- Truth table representations -- Any arbitrary function can be built out of these gates (no attempt at minimization. Just an awareness exercise) -- full ADDER, MUX, DECODER -- Basic storage element (Gated RS latch) -- A register September 15: Lecture 6. Memory and Finite State Machines -- a logic circuit to implement a small piece of memory (perhaps 2**2 x 3) -- concept of memory: address space, addressability -- The notion of state (one of the most important concepts in engineering) -- State diagram, Next State table, State Assignment -- Implementation example: sequential machine

September 16,17: Discussion Session. Emphasis on Chapter 3, problem set 2

September 20: Lecture 7. Finite State Machines (continued).

September 22: Lecture 8. Chapter 4: Introduction to Von Neumann model and the LC-3 ISA. -- the basic structure of the Von Neumann model, showing the basic flow. -- instruction = opcode, operands -- encoding of instructions and data -- instruction cycle (Fetch, Decode, EA, Fetch data, Execute, Store result) -- organization of memory -- address space, addressability revisited (MAR, MDR) -- instruction formats -- operate, data movement, and control instructions -- LD/ST (also, indirects) -- control (condition codes: N,Z,P) -- The datapath necessary to implement the LC- -- I/O via the TRAP instruction [Keyboard in, screen out]

September 23,24: Discussion Session: Intro to LC-3, the Simulator and Program 0.

Programming Lab 0 due, 11:59pm, September 26.

Problem set 2, due before class, September 27.

September 27: Lecture 9. Chapter 4 (continued), Chapter 5, the LC-3 ISA, its data path and control

September 29: Lecture 10. A sophisticated LC-3 program -- a detailed example in machine language -- example will use keyboard input, monitor output. -- example will include entering data via the keyboard and outputting on the monitor

September 30, October 1: Discussion Session: Chapter 5, PL

Programming Lab 1 due, 11:59pm, October 3.

October 4, Lecture 11. Chapter 6: Structured Programming and Debugging -- Elements of Problem Solving (stepwise refinement, systematic decomposition, etc.) -- Fundamentals of Debugging (setting breakpoints, single-step, deposit, examine, etc.) -- the control structure of a stored program (sequential, conditional, iteration)

October 6: Lecture 12. More on structured programming and debugging.

October 10,11: Discussion Session: Prepare for Midterm exam.

Problem set 3, due before class, October 11.

October 11: Lecture 13. Review or catch up!

October 13: Lecture 14. Exam 1.

October 14,15: Discussion Session: Go over exam, discuss Programming Lab 2.

October 18: Lecture 15. Chapter 7: Moving up a level, Assembly Language and the Assembler.

October 20: Lecture 16. Detailed examples in Assembly Language.

November 24: No class, Thanksgiving Recess. Enjoy the Holiday!

Programming Lab 4 due, 11:59pm, November 2 8.

November 29: Lecture 26. Chapter 9 TRAPs, Interrupts (continued).

December 1: Lecture 27. Chapter 10: Chapter 10 The Calculator, life after EE

-- ASCII/2’s-complement conversion -- Stack arithmetic -- The Calculator, itself -- Parallelism. The latest hot button! -- Preview of coming attractions: The ARM ISA and its THUMB instruction set

December 2,3: Discussion Session: Traps, Interrupts, Programming Lab 5

Programming Lab 5 due, December 5 , 5pm

December 6: Lecture 28. Last lecture. Free-for-all. Any OTHER questions!

Problem set 6, not to be handed in, use for final exam preparation.

December 10. Likely date of the Final Exam , 7 to 10pm. (Note: the Registrar may change the date of the final exam at his discretion. Please do not make plans to leave campus for the semester break until after the date of our final exam is confirmed by the Registrar’s office.

Programming Labs:

0th programming Lab Due September 26, 11:59pm. 1st programming Lab (machine language) -- Due: October 3, 11:59pm. 2nd programming Lab (assembly language) -- Due: October 31 , 11:59pm. 3rd programming Lab (assembly language) -- Due: November 14 , 11:59pm. 4th programming Lab (assembly language) -- Due: November 23, 11:59pm. 5th programming Lab (assembly language) -- Due: December 5 , 5pm.

Problem Sets:

1st problem set, (emphasis on Chapters 1,2). Due: just before class, September 13. 2nd problem set, (emphasis on Chapter 2,3). Due: just before class, September 27. 3rd problem set, (emphasis on Chapter 1-6). Due: just before class, October 11. (Note: exam on October

4th problem set, (emphasis on Chapter 7,8). Due: just before class, November 1. 5th problem set, (emphasis on Chapters 8,9). Due: just before class, November 15. (Note: exam on Novem- ber 17) 6th problem set, (emphasis on Chapter 9,10). Not to turn in.