ECE 598 SV
Formal Hardware/SoC Verification
Assignment
(due October 22)
Question 1
Model the system described below:
An elevator system is to drive a cabin which can service four floors, numbered 0 to 3. The cabin
can move up and down between the floors. At each floor, there is a position detector reporting
when the cabin has safely reached the corresponding floor. The cabin door can be opened and
closed. There are sensors to report if the door is completely open or completely closed. Finally,
there are request buttons at each floor and in the cabin, by which users can request the elevator to
travel to the different floors.
A set of variables/functions you might want to use, is given in the table:
Signal Meaning
at[i]
req[i]
is_open
is_closed
The cabin is at floor i.
There is a pending request to visit floor i.
The elevator door is completely open.
The elevator door is completely closed.
do_open
do_close
do_up
do_down
Open the elevator door.
Close the elevator door.
Move the cabin upwards.
Move the cabin downwards.
Verify the properties:
-The elevator door is safely closed when the cabin is traveling between floors
-The elevator never passes a floor with a pending request without servicing that request
-Every request is eventually serviced
Question 2
A cache coherence protocol is described in cache.pdf. The SMV model derived from this is given
in the file gccp.txt. It models a single cluster of 3 processors with one memory block.
Verify the following properties:
1. Freedom from deadlock:
It is always possible that the memory block will become readable by the given processor, and
always possible that it will become writable.
2. Safety:
The memory block never becomes writable by two processors at the same time.
