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CS/COE0447: Computer Organization
and Assembly Languageand Assembly Language
Chapter 3Chapter 3
Sangyeun ChoSangyeun Cho
Dept. of Computer Science University of Pittsburgh
Five classic componentsFive classic components
I am like a controlI am like a control I am like a pack offile folders tower file folders
I am like a conveyor
I exchange information with outside world belt + service stations
CS/CoE0447: Computer Organization and Assembly Language (^) University of Pittsburgh 2
Binary arithmeticBinary arithmetic
(Sounds scary)y
So far we studied
- IInstruction set architecture basic t ti t hit t b i
- MIPS architecture & assembly language
WW e will review binary arithmeticill i bi i h i
algorithms and their
implementations
Binary arithmetic will form the
basis for CPU’s datapath design
CS/CoE0447: Computer Organization and Assembly Language (^) University of Pittsburgh
basis for CPU s datapath design
Binary number representationsBinary number representations
We looked at how to represent a number (in fact the valuep
represented by a number) in binary
- Unsigned numbers – everything is positive
We will deal with more complicated cases
- Negative numbers
- RReal numbers (a.k.a. floating-point numbers) l b ( k fl ti i t b )
The first question: How do we represent a negative numberq p g
in decimal?
CS/CoE0447: Computer Organization and Assembly Language (^) University of Pittsburgh
Method 1: signMethod 1: sign magnitude-magnitude
This is the same method we use for decimal numbers
{sign bit, absolute value (magnitude)}
- Sign bit 0 – positive, 1 – negative 0 positive, 1 negative
- Examples, assume 4-bit representation 0000 0 0011 3 1001 - 1111 - 1000?
Properties
- Two 0s – a positive 0 and a negative 0?
- There are equal # of positive and negative numbers
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Method 2: oneMethod 2: one s complement’s complement
((2 N^ – 1) – number)
• A + (-A) = 2N^ – 1
- Given a number A, it’s negation is done by (1111…1111 – A)
- In fact, simple bit-by-bit inversion will give the same-magnitude number with a different signnumber with a different sign
- Examples, assume 4-bit representation 0000 0 0011 3 1001 - 1111 - 1000?
PP ropertiesti
- There are two 0s
- There are equal # of positive and negative numbers
CS/CoE0447: Computer Organization and Assembly Language (^) University of Pittsburgh 6
Method 3: twoMethod 3: two s complement’s complement
(2 N^ – number)
• A + (-A) = 2N
- Given a number A, it’s negation is done by (1111…1111 – A) + 1
- In fact, simple bit-by-bit inversion followed by adding 1 will give the same magnitude number with a different signsame-magnitude number with a different sign
- Examples, assume 4-bit representation 0000 0 0011 3 1001 - 1111 - 1000?
PP ropertiesti
- There is a single 0
- There are unequal # of positive and negative numbers
CS/CoE0447: Computer Organization and Assembly Language (^) University of Pittsburgh
SummarySummary
Code Sign-Magnitude 1’s Complement 2’s Complement 000 +0 +0 + 001 +1 +1 + 010 +2 +2 + 011 +3 +3 + 100 -0 -3 - 101101 -1-1 -2-2 -3- 110 -2 -1 - 111 -3 -0 -
Issues
of zeros
- Balance A ith ti l ith i l t ti
CS/CoE0447: Computer Organization and Assembly Language (^) University of Pittsburgh
- Arithmetic algorithm implementation
What happens on overflow?What happens on overflow?
The CPU can
- Generate an exception (what is an exception?)
- Set a flag in the status register (what is the status register?)
- Do nothingg
Languages may have different notions about overflow
Do we have overflows in the case of unsigned, always
positive numbers?p
- Example: addu, addiu, subu
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MIPS exampleMIPS example
I looked at the MIPS32 instruction set manual
ADD, ADDI instructions generate an exception on overflow
ADDU, ADDIU are silent
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C language exampleC language example
CS/CoE0447: Computer Organization and Assembly Language (^) University of Pittsburgh
SubtractionSubtraction
We know how to add
We know how to negate a
number
We will use the above two
known operations to perform
subtraction
AA – B = A + (-B)B A + ( B)
The hardware used for
addition can be extended to
handle subtraction!
CS/CoE0447: Computer Organization and Assembly Language (^) University of Pittsburgh
handle subtraction!
1 1 bit adder-bit adder
We will look at a single-bit adderg
- Will build on this adder to design a 32-bit adder
3 inputs3 inputs
- A: 1st^ input
- B: 2nd^ input
- CC (^) in: carry inputi t
2 outputs
- S: sum
- C (^) out: carry out
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NN bit adder-bit adder
An N-bit adder can be constructed
with N single-bit adders
- A carry out generated in a stage is propagated to the next (“ripple-carry adder”adder
3 inputs
- A: N bit 1A: N-bit, 1stst^ inputinput
- B: N-bit, 2nd^ input
- C (^) in: carry input
2 outputs
- S: N-bit sum
- C (^) t: carry out
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C (^) out: carry out
NN bit ripple carry adder-bit ripple-carry adder
(0)
carry in at each stage (0) (1) (1) (0) (0)
0 0 1 1 1
0 0 1 1 0
(0) 0 (0) 1 (1) 1 (1) 0 (0) 1
CS/CoE0447: Computer Organization and Assembly Language (^) University of Pittsburgh
carry out at each stage
Describing a singleDescribing a single bit adder-bit adder
A “truth” table will tell us about the operation of a single-bitp g
adder
Input Output A B C (^) in C (^) out S 0 0 0 0 0 0 0 1 0 1 00 11 00 00 11 0 1 1 1 0 1 0 0 0 1 11 00 11 11 00 1 1 0 1 0 1 1 1 1 1
CS/CoE0447: Computer Organization and Assembly Language (^) University of Pittsburgh
Hardware design 3Hardware design 3
32-bit ALU
64-bit shift register
Removed a 32-bit shift register!
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g
ExampleExample
Let’s do 0010×0110 (2×6), unsignedg
Iteration Multiplicand
Implementation 3 Step Product 0 0010 initial values 0000 0110
1 0010
1: 0 -> no op (^) 0000 0110 2: shift right (^) 0000 0011
2 0010
1: 1 -> product = product + multiplicand 0010 0011 2: shift right (^) 0001 0001 1: 1 -> product = 3 0010 product + multiplicandproduct + multiplicand^ 0011 0001 2: shift right (^) 0001 1000
4 0010
1: 0 -> no op (^) 0001 1000 2: shift right (^) 0000 1100
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2: shift right (^) 0000 1100
BoothBooth s encoding’s encoding
Three symbols to represent a binary number: {1,0,-1}
Examples (8-bit encoding)
- 11111111 (two’s complement) 0000000 1 (Booth’s encoding)0000000-1 (Booth s encoding)
- 14 00001110 (two’s complement) 000100-10 (Booth’s encoding)
Bit transitions in number (in two’s complement encoding) show
how Booth’s encoding works
- 0 to 0 (from right to left): 00 to 0 (from right to left): 0
- 0 to 1: -
- 1 to 1: 0
- 1 to 0: 1
CS/CoE0447: Computer Organization and Assembly Language (^) University of Pittsburgh
BoothBooth s encoding’s encoding
Key pointy p
- A “1” in he multiplier implies an addition operation
- If you have many “1”s – that means many addition operations
Booth’s encoding is useful because it can reduce the number
of addition operations you have to perform
With Booth’s encoding, partial results are obtained by
- Adding multiplicandg p
- Adding 0
- Subtracting multiplicand
CS/CoE0447: Computer Organization and Assembly Language (^) University of Pittsburgh
BoothBooth s algorithm in action’s algorithm in action
Let’s do 0010×1101 (2×-3)
Iteration Multiplicand
Booth’s algorithm Step Product 0 0010 initial values^ 0000 1101 0
1 0010
10 -> product = product – multiplicand 1110 1101 0 shift rightg (^) 1111 0110 1
2 0010
01 -> product = product + multiplicand 0001 0110 1 shift right (^) 0000 1011 0 10 -> product = (^) 1110 1011 0 3 0010
10 > product product – multiplicand 1110 1011 0 shift right 1111 0101 1
4 0010
11 -> no op (^) 1111 0101 1
CS/CoE0447: Computer Organization and Assembly Language (^) University of Pittsburgh
shift right (^) 1111 1010 1
BoothBooth s algorithm in action’s algorithm in action
IterationIteration MultiplicandMultiplicand Booth’s algorithm Step Product 0 1
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CS/CoE0447: Computer Organization and Assembly Language (^) University of Pittsburgh
