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Single vs. Multi-cycle Implementation
•Single cycle design is simple
•But it’s inefficient
•Why?
•All instructions have same clock cycle length - they
all take the same amount of time regardless of what
they actually do
•Clock cycle determined by longest path
–Load: uses IM, RF, ALU, DM, RF in sequence
•But others may be shorter
–R-type (arithmetic): use IM, RF, ALU, RF
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Single vs. Multi-cycle Implementation
•For this simple version, the multi-cycle
implementation could be as much as 1.27 times
faster (for a typical instruction mix)
•Suppose we had floating point operations
–Floating point has very high latency
–E.g., floating-point multiply may be 16 ns vs
integer add may be 2 ns
–So, clock cycle constrained by 16 ns of FP
•Suppose a program doesn’t do ANY floating point?
–Performance penalty is too big to tolerate
