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Five problems related to semiconductor physics, focusing on the design and analysis of silicon pn diodes. Topics include impurity doping, junction capacitance, and built-in barrier potential. Students are required to determine electron and hole concentrations, required dopant impurity concentrations, maximum allowable temperatures, and reverse bias voltages.
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ECE 250 Homework # Due 9/15/2008 (Monday). Problem 1: A silicon semiconductor is to be designed such that the majority carrier electron concentration is no =7× 10 15 cm-^.
a) Should donor or acceptor impurity atoms be added to intrinsic silicon to achieve this electron concentration? b) What concentration of dopant impurity atoms is required? c) In this silicon material, the minority carrier hole concentration is to be no larger than po =10^6 cm-^. Determine the maximum allowable temperature.
Problem 2: The donor concentration in the n-region of a silicon pn diode at 300 °K is N (^) d = 10^17 /cm^3. The minority carrier concentration in the p-region is npo =3× 103 /cm^3. The zero bias junction capacitance for this diode is Cjo=2 pF. Find the junction capacitance with a reverse bias of 10 volts. Assume that m= 0.5.
Problem 3: A silicon PN diode is operated at 50 °C. The doping concentration on the P-side is 10^15 /cm^3. The doping concentration on the n-side is 5·10 17 /cm^3. The zero bias junction capacitance is Cjo = 40 pF, and the grading coefficient is M = 0.5. At what reverse bias voltage will the junction capacitance be equal to 10 pF?
Problem 4: For the diode of problem 1, Cjo is measured to be 2 pF. Generate a plot of the junction capacitance Cj versus reverse diode voltage, VR , for 1 mV ≤ VR ≤ 10 V. The x-axis should be a log scale for this plot.
Problem 5: A silicon PN junction diode has a donor doping concentration of Nd =10 17 /cm^3 and an acceptor doping concentration of Na=10^16 /cm^3. Plot the built-in barrier potential for this diode for temperatures from 0 °C to 125 °C. Should the y-axis be plotted in a log scale? Why or why not?