Topic 2: Hardware/software functional
partitioning
Introduction
Discrete logic
Definetion : a chip that contains one logic or or a number of logic gates.
Logic gates:
Its a collection of transistors and resistors that implement boolean logic operations in a
circuit.
Transistors make up logic gate, logic gates make circuits and circuits make up electronic
system.
Programmable Logic Devices
A programmable Logic device refers to any type of integrated circuit that a logic design can
be implemented and reconfigured in the field by the end user. Since these logic devices can
be programmed in the field they are also called Field Programmable Logic Devices
(FPLDs). The PLD provides flexibility for designers to implement many different designs in
varying complexities for many different applications. One of the most common PLDs is the
one time Programmable Read-only Memory (PROM).For low volume embedded systems,
non volatile memory is more appropriate. This comes in two different types: (a) mask
programmable devices programmed by the vendor using a custom mask and interconnects
and (b) field programmable devices that are configured by the user. One of the great
advantages of PLDs is that they are very inexpensive at low quantities.
A device that was a follow on from the PROM technology that can be used for logic designs
was the Programmable Logic Array (PLA). The PLA using the PROM structure turned out to
be the first Field Programmable Logic Array (FPLA). The first FPLA was introduced in the
mid-1970s. The FPLA had a fixed number of inputs, outputs and product terms that
consisted of AND and OR arrays that contained programmable inputs. The FPLA did not
have great success because they were very slow and complicated to use. The designer had
to design to a fuse map instead of conventional boolean equations or schematic capture.
In the late 1970s the Programmable Array Logic (PAL) architecture was introduced that
increased the use of programmable logic. The PAL architecture consisted of a
programmable AND array and a fixed OR array so that each output is the sum of a specific
set of product terms. The design entry tool for the earlier PAL was in the form of Boolean
equations making it very easy to learn and implement. PAL devices are now available in
different varieties from different vendors providing flexibility inputs/outputs, size of the OR-
gate, and flip-flops. Some PALs are even provided in either NAND/NAND or NOR/NOR
structure to increase design flexibility instead of the AND/OR structure.
PLDs can be divided into two groups, Simple Programmable Logic Devices (SPLDs) and
High-Density Programmable Logic Devices (HDPLDs). SPLDs come in the PAL and PLA
