Programmable Logic Devices - Computer Science - Lecture Slides, Slides of Computer Science

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PROGRAMMABLE

LOGIC DEVICES

(PLD)

PLD

• Problems by Using Basic Gates
• Many components on PCB:
  • As no. of components rise, nodes interconnection

complexity grow exponentially

• Growth in interconnection will cause increase in

interference, PCB size, PCB design cost, and

manufacturing time

PLD

• The first three varieties are quite similar to each

other:

• They all have an input connection matrix, which connects the inputs of the device to an array of AND-gates.
• They all have an output connection matrix, which connect the outputs of the AND-gates to the inputs of OR-gates which drive the outputs of the device.
• The gate array is significantly different and will be

described later.

PLD

• The differences between the first three categories

are these:

• 1. In a ROM, the input connection matrix is hardwired. The user can modify the output connection matrix.
• In a PAL/GAL the output connection matrix is hardwired. The user can modify the input connection matrix.
• In a PLA the user can modify both the input connection matrix and the output connection matrix.

( a ) Symbol. ( b ) Logic equivalent.

Buffer/inverter

( a ) Before programming. ( b ) After programming.

Programming by blowing

fuses.

AND - PLD Notation

Using a PROM for logic design

( a ) Truth table. ( b ) PROM realization.

A simple four-input, three-output PAL device.

( a ) Circuit diagram. ( b ) Symbolic representation.

Exclusive-or-gate with a programmable fuse