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Understanding Computer Architecture: A Deep Dive into the Von Neumann Model, Slides of Aeronautical Engineering

University of AllahabadAeronautical Engineering

An in-depth exploration of computer architecture, focusing on the von neumann model. Learn about the components of a computer system, including the processor, arithmetic logic unit (alu), control unit (cu), registers, memory, input and output devices, and bus. Discover how data is processed, stored, and transferred between these elements. Additionally, explore the concept of instruction set architecture and the role of device controllers in managing input and output operations.

Typology: Slides

2011/2012

Uploaded on 07/20/2012

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bg1
of wires”)
Computer Architecture
computer architecture =
computer organization + instruction set architecture
von Neumann architecture
computer
processor
ALU
CU
Reg
Reg 10101101
…
01111000
Input
Output
bus
• The Arithmetic Logic Unit (ALU)
• The Control Unit
• The memory
• The input and output devices (I/O)
memory devices
How Computers Work
• von Neumann architecture
– Describes a computer with 4 main sections
– The parts are connected by a bus (“bundle
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Download Understanding Computer Architecture: A Deep Dive into the Von Neumann Model and more Slides Aeronautical Engineering in PDF only on Docsity!

of wires”)

Computer Architecture

computer architecture =

computer organization + instruction set architecture

von Neumann architecture

computer

processor

ALU

CU

Reg

Reg

Input

Output

bus

  • The Arithmetic Logic Unit (ALU)
  • The Control Unit
  • The memory
  • The input and output devices (I/O)

memory devices

How Computers Work

  • von Neumann architecture
    • Describes a computer with 4 main sections
    • The parts are connected by a bus (“bundle

Computer Organization

  • CPU : central processing unit

contained in the software

  • Arithmetic Logic Unit : performs operations

such as addition, subtraction, bit-wise AND, OR,

  • Control Unit : “directs the CPU’s operations”

fetches instructions from memory, decodes

them and produces signals which control the

other parts of the computer

Example 1:

Adding values stored in memory

computer

processor ALU

CU

10101101 … 01111000

Input

bus

1. Get one of the values to be

added from memory and

place it in a register

2. Get the other value to be

added from memory and

place it in another register

3. Activate the addition

circuitry with the registers

used in 1 and 2 as inputs

and another register

designated to hold the result

4. Store the result in memory

5. Stop

memory devices

  • Interprets and carries out the instructions

Reg

Reg

Output

Hard drive controller

Device Controllers

CPU Memory

Video controller

DVD

controller controller controller

Memory mapped I/O Direct Memory Access (DMA)

The von Neumann Bottleneck

memory devices ALU CU

Reg

Reg (^10101101) … 01111000

Input

bus

Fetch

unit

Decode

unit

Execute

unit

Pipelined CPU

processor

Hard drive controller

USB Network

  • Cache memory

computer

Output

  • Other architectures
    • Pipelined CPU
    • Multiprocessor Machine

Instruction Set Architecture

  • ISA : spec. detailing the commands a

CPU should be able to understand and

execute

  • …

Instruction Set

machine language

instructions that a processor

understands

fields

Hardware

Software

  • add, sub, mult, …, how is it specified
  • 0, 1, 2, 3
  • where besides memory
  • how is memory location specified
  • byte, integer, float, …

Instruction Set

  • Operations
  • Number of operands
  • Operand storage
  • Memory address
  • Type and size of operands
  • The collection of
  • Instructions are bits with well defined

Dividing values stored in

memory

described in Appendix C

The architecture of the machine

CPU

00

01

02

03

FF

Bus 0

1

2

F

Program counter

Instruction register

Main memory

Address Cells Registers

Arithmetic / Logic Unit Control Unit

STEP 1. LOAD a register with a value from memory.

STEP 2.

STEP 3.

STEP 4.

STEP 5.

STEP 6.

LOAD another register with another value from memory.

STORE the contents of the third register in memory.

STOP.

If this second value is zero, JUMP to step 6.

Divide the contents of the first register by the second register and leave the result in a third register.

The composition of an instruction

for the machine in Appendix C

Decoding the instruction 35A

3 5 A 7

0011 0101 1010 0111

[^3 5 A^7

[

to store the contents

Op-code Operand

16-bit pattern

4-digit hexadecimal form

Instruction

Op-code 3 means

of a register in a

memory cell.

This part of the operand identifies the register

whose contents are to be

stored.

This part of the operand

identifies the address of the memory cell that is to

receive data.