8086 Microprocessor Architecture: A Deep Dive, Lecture notes of Microprocessors

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ARCHITECTURE

SEGMENTATION, MEMORY BANKING,

PIPELINING, FLAG REGISTERS & PIN

DIAGRAM

SEGMENTATION AND MEMORY BANKING

MEMORY SEGMENTATION ctd.. ■ In 8086, memory has four different types of segments. These are:

• (^) Code Segment
• (^) Data Segment
• (^) Stack Segment
• (^) Extra Segment
• (^) Description on next slide…..

■ (^) Code Segment

• (^) This segment is used to hold the program to be executed.
• (^) Instructions are fetched from the Code Segment.
• CS register holds the 16-bit base address for this segment.
• IP register (Instruction Pointer) holds the 16-bit offset address. ■ (^) Data Segment
• (^) This segment is used to hold general data.
• This segment also holds the source operands during string operations.
• DS register holds the 16-bit base address for this segment.
• (^) BX register is used to hold the 16-bit offset for this segment.
• (^) SI register (Source Index) holds the 16-bit offset address during String Operations. ■ Stack Segment
• This segment holds the Stack memory, which operates in LIFO manner.
• SS holds its Base address.
• (^) SP (Stack Pointer) holds the 16-bit offset address of the Top of the Stack.
• (^) BP (Base Pointer) holds the 16-bit offset address during Random Access. ■ Extra Segment
• This segment is used to hold general data
• (^) Additionally, this segment is used as the destination during String Operations.
• (^) ES holds the Base Address.
• DI holds the offset address during string operations.

■ (^) How is a 20-bit address obtained if there are only 16-bit registers? ■ (^) The 20-bit address of a byte is called its Physical Address. ■ (^) But, it is specified as a Logical Address. ■ Logical address is in the form of: Base Address : Offset ■ Offset is the displacement of the memory location from the starting location of the segment. MEMORY SEGMENTATION ctd..

■ (^) The value of Data Segment Register (DS) is 2222 H. ■ To convert this 16-bit address into 20-bit, the BIU appends 0H to the LSBs of the address. ■ (^) After appending, the starting address of the Data Segment becomes 22220H. ■ If the data at any location has a logical address specified as: 2222 H : 0016 H ■ Then, the number 0016 H is the offset. ■ (^) 2222 H is the value of DS. MEMORY SEGMENTATION ctd.. Example

■ All offsets are limited to 16-bits.

■ It means that the maximum size possible for segment is 2^16 = 65,

bytes (64 KB).

■ The offset of the first location within the segment is 0000 H.

■ The offset of the last location in the segment is FFFF H.

■ Where to Look for the Offset MEMORY SEGMENTATION ctd..

■ The contents of the following registers are:

• (^) CS = 1111 H
• DS = 3333 H
• (^) SS = 2526 H
• IP = 1232 H
• (^) SP = 1100 H
• (^) DI = 0020 H ■ (^) Calculate the corresponding physical addresses for the address bytes in CS, DS and SS. MEMORY SEGMENTATION ctd..Example

MEMORY BANKING

■ In an 8086 based system, the 1Mbyte memory is physically organized as

odd bank and even bank, each of 512kbytes, addressed in parallel by the

processor.

■ Byte data with even address is transferred on D7 – D0 and byte data with

odd address is transferred on D15 – D8.

■ The processor provides two enable signals, BHE and A0 for selecting of

either even or odd or both the banks.

BHE A 0^ Function 0 0 Whole word 0 1 Upper byte/ odd address 1 0 Lower byte/even address 1 1 none

ARCHITECTU RE

Functional blocks Flag Register Timing and control unit Register array or internal memory Instruction decoding unit PC/ IP

ALU

Control Bus Address Bus Data Bus 17 Computational Unit; performs arithmetic and logic operations Various conditions of the results are stored as status bits called flags in flag register Internal storage of data Generates the address of the instructions to be fetched from the memory and send through address bus to the memory Decodes instructions; sends information to the timing and control unit Generates control signals for internal and external operations of the microprocessor

8086 ARCHITECTURE

MAIN HIGHLIGHTS Execution Unit (EU) EU executes instructions that have already been fetched by the BIU. BIU and EU functions separately. Bus Interface Unit (BIU) BIU fetches instructions, reads data from memory and I/O ports, writes data to memory and I/ O ports.