Download ECE 2030 Computer Eng. Spring 2003 - Digital Logic & Arithmetic Units Exam Solutions and more Exams Computer Science in PDF only on Docsity!
4 problems, 5 pages Exam Two Solutions 12 March 2003
Problem 1 (7 parts, 44 points) “Waste not, mux not”
This problem will examine the design of a number of common digital blocks using only pass gates and inverters. After an object (e.g., 2-to-1 mux) has been implemented, it can be used, in icon form, for subsequent parts.
Part A (6 points) Begin by implementing a pass gate and an inverter in the light gray boxes below using only N and P type switches (N-FETs and P-FETs). The icons show signal names.
A B
C
C
in out
A B
C
C
in out
Part B (6 points) Implement a 2-to-1 mux with only pass gates and inverters.
in
out
in
S
S
in
in out
mux
Part C (6 points) Implement a two-input AND gate using only a 2-to-1 mux.
A
out
B
out
A
B
OUT
IN 0
S
2 to 1
IN 1
4 problems, 5 pages Exam Two Solutions 12 March 2003
Part D (6 points) Implement a two-input XOR gate using only a 2-to-1 mux and an inverter.
A
out
B
AB out OUT IN 0
S
2 to 1
IN 1
Part E (6 points) Implement a transparent latch using only a 2-to-1 mux and inverters.
in
out
en
en
in out
latch OUT
IN 0
S
2 to 1
IN^1
Part F (7 points) Implement a register with write and read enable using only a 2-to-1 mux, latches, pass gates, and inverters.
in out register we re p1 p
in
out
p1 p
we (^) re en
in out
latch
en
in out
latch OUT
IN 0
S
2 to 1
IN 1
4 problems, 5 pages Exam Two Solutions 12 March 2003
Problem 3 (2 parts, 16 points) Numbers and Karnaugh Maps
Part A (10 points) For the following behavior (in map format), derive a simplified products of sums expression using a Karnaugh Map. Circle and list the prime implicants, indicating which are essential. Then write the simplified POS expression.
X 0 1 1
X 0 X 1
X X 0 1
A
A
B B
C
C
C
D
D D
prime implicants
essential? yes no
A + D
B + D
simplified POS expression
Part B (6 points) Convert the following octal values into hexadecimal notation:
octal notation hexadecimal notation
753 111101011 = 1EB
3162 11001110010 = 672
601.71 110000001.111001 = 181.E
4 problems, 5 pages Exam Two Solutions 12 March 2003
Problem 4 (2 part, 20 points) Arithmetic Unit
Part A (10 points) The adder below adds two four bit numbers A and B and produces a four bit result S. Add extra digital logic to support subtraction as well as addition. Label inputs X 3 , X 2 ,
X 1 , X 0 , Y 3 , Y 2 , Y 1 , Y 0 , ADD / SUB and outputs Z 3 , Z 2 , Z 1 , Z 0.
A 3 A 2 A 1 A 0 B^3 B^2 B^1 B^0
S 3 S 2 S 1 S 0
Cin
X 3 X 2 X 1 X 0
Y 3 Y 2 Y 1 Y 0
Z 3 Z 2 Z 1 Z 0
ADD/SUB
Part B (10 points) Now define the behavior for a two’s compliment overflow detection unit.
Assume the inputs are X 3 , Y 3 , Z 3 , and ADD / SUB. The output Error is 1 for overflow.
ADD / SUB = 0 ADD / SUB = 1
X 3 Y 3 Z 3 Error X 3 Y 3 Z 3 Error
0 0 0 0 0 0 0 0
1 0 0 0 1 0 0 1
0 1 0 0 0 1 0 0
1 1 0 1 1 1 0 0
0 0 1 1 0 0 1 0
1 0 1 0 1 0 1 0
0 1 1 0 0 1 1 1
1 1 1 0 1 1 1 0
