Iterative Modulo Scheduling: A Technique for Software Pipelining Loops - Prof. Scott Mahlk, Study notes of Electrical and Electronics Engineering

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• EECS 583 – Class 17 Iterative Modulo Scheduling University of Michigan March 16,

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Reading Material^ Y^ Today’s class^ »^ “Iterative Modulo Scheduling: An Algorithm for SoftwarePipelining Loops”, B. Rau, MICRO-27, 1994, pp. 63-74.^ »^ "Code Generation Schemas for Modulo Scheduled DO-Loopsand WHILE-Loops", B. Rau, M. Schlansker, and P. Tirumalai,^ MICRO-25, Dec. 1992.^ Y^ Material for the next lecture^ »^ "Register Allocation & Spilling Via Graph Coloring",^ G. Chaitin, Proc. 1982 SIGPLAN Symposium on CompilerConstruction, 1982.

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ResMII^ Concept: If there were no dependences between the operations, what^ is the the shortest possible schedule?^ Simple resource model^ A processor has a set of resources R. For each resource r in R^ there is count(r) specifying the number of identical copies^ ResMII = MAX

(uses(r) / count(r)) for all r in R uses(r) = number of times the resource is used in 1 iteration In reality its more complex than this because operations can have multiple alternatives (different choices for resources it could be assigned to), but we will ignore this for now

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ResMII Example^ resources: 4 issue, 2 alu, 1 mem, 1 br^ latencies: add=1, mpy=3, ld = 2, st = 1, br = 1^ 1: r3 = load(r1)2: r4 = r3 * 263: store (r2, r4)4: r1 = r1 + 45: r2 = r2 + 46: p1 = cmpp (r1 < r9)7: brct p1 Loop

ALU: used by 2, 4, 5, 6^ Æ^ 4 ops / 2 units = 2 Mem: used by 1, 3^ Æ^ 2 ops / 1 unit = 2 Br: used by 7^ Æ^ 1 op / 1 unit = 1 ResMII = MAX(2,2,1) = 2

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RecMII Example^ 1: r3 = load(r1)2: r4 = r3 * 263: store (r2, r4)4: r1 = r1 + 45: r2 = r2 + 46: p1 = cmpp (r1 < r9)7: brct p1 Loop

4 Æ^ 4: 1 / 1 = 1 5 Æ^ 5: 1 / 1 = 1 4 Æ^1 Æ^ 4: 1 / 1 = 1 5 Æ^3 Æ^ 5: 1 / 1 = 1 RecMII = MAX(1,1,1,1) = 1 Then, MII = MAX(ResMII, RecMII) MII = MAX(2,1) = 2 0,0^ 1,0^ 1,0^7 <delay, distance>

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Class Problem^ Latencies: ld = 2, st = 1, add = 1, cmpp = 1, br = 1^ Resources: 1 ALU, 1 MEM, 1 BR^ 1: r1[-1] = load(r2[0])2: r3[-1] = r1[1] – r1[2]3: store (r3[-1], r2[0])4: r2[-1] = r2[0] + 45: p1[-1] = cmpp (r2[-1] < 100)remap r1, r2, r36: brct p1[-1] Loop^ Calculate RecMII, ResMII, and MII

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Priority Function^ Height-based priority worked well for acyclic scheduling, makes sense^ that it will work for loops as well Acyclic:^ Height(X) =

0, if X has no successors MAX^ ((Height(Y) + Delay(X,Y)), otherwise for all Y = succ(X) Cyclic:^ HeightR(X) =

0, if X has no successors MAX^ ((HeightR(Y) + EffDelay(X,Y)), otherwise for all Y = succ(X) EffDelay(X,Y) = Delay(X,Y) – II*Distance(X,Y)

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Calculating Height 1.^ Insert pseudo edges from all nodes to branch with^ latency = 0, distance = 0 (dotted edges) 2.^ Compute II, For this example assume II = 2 3.^ HeightR(4) = 4.^ HeightR(3) = 5.^ HeightR(2) = 6.^ HeightR(1)

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Loop Prolog and Epilog

II = 3

Prolog

Kernel^ Epilog

Only the kernel involves executing full width of operations Prolog and epilog execute a subset (ramp-up and ramp-down)

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Separate Code for Prolog and Epilog

A0A1^ B0A2^ B1^ C0 A^ B^ C^

Prolog -fill thepipe D^ KernelBn Cn-1 Dn-2Epilog -Cn Dn-1drain theDnpipe

A B C D Loop body with 4 ops Generate special code before the loop (preheader) to fill the pipe and special code after the loop to drain the pipe. Peel off II-1 iterations for the prolog. Complete II-1 iterations in epilog

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Kernel-only Code Using Rotating Predicates^ A0A1^ B0A2^ B1^ C0 A^ B^ C^

D Bn Cn-1 Dn-2Cn Dn-1Dn

A if P[0]^ B if P[1]

C if P[2] D if P[3] P referred to as the staging predicate

P[0]^ P[1]^

P[2]^ P[3]

A^ -^

-^ -

A^ B^

-^ -

A^ B^

C^ -

A^ B^

C^ D

…-^ B^

C^ D

-^ -^

C^ D

-^ -^

-^ D

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Modulo Scheduling Architectural Support^ Y^ Loop requiring N iterations^ »^ Will take N + (S – 1) where S is the number of stages^ Y^ 2 special registers created^ »^ LC: loop counter (holds N)^ »^ ESC: epilog stage counter (holds S)^ Y^ Software pipeline branch operations^ »^ Initialize LC = N, ESC = S in loop preheader^ »^ All rotating predicates are cleared^ »^ BRF.B.B.F^ y^ While LC > 0, decrement LC and RRB, P[0] = 1, branch to top ofloop

X^ This occurs for prolog and kernel y If LC = 0, then while ESC > 0, decrement RRB and write a 0 intoP[0], and branch to the top of the loop X^ This occurs for the epilog

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Modulo Scheduling - Driver^ Y^ compute MII^ Y^ II = MII^ Y^ budget = BUDGET_RATIO * number of ops^ Y^ while (schedule is not found) do^ »^ iterative_schedule(II, budget)^ »^ II++^ Y^ Budget_ratio is a measure of the amount of backtracking that can beperformed before giving up and trying a higher II

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Modulo Scheduling – Iterative Scheduler^ Y^ iterative_schedule(II, budget)^ »^ compute op priorities^ »^ while (there are unscheduled ops and budget > 0) do^ y^ op = unscheduled op with the highest priority^ y^ min = early time for op (E(Y))^ y^ max = min + II – 1^ y^ t = find_slot(op, min, max)^ y^ schedule op at time t

X^ /* Backtracking phase – undo previous scheduling decisions */ X^ Unschedule all previously scheduled ops that conflict with op y budget--