Types of Memory in Computer Systems, Assignments of Microprocessors

An overview of different types of memory used in computer systems, including their write ability ranges, storage permanence, and examples of each type. It also covers rom, combinational function implementation, and various types of ram. Details about mask-programmable rom, otp rom, eprom, eeprom, flash memory, and ram variations such as sram, dram, psram, and nvram.

Typology: Assignments

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ECE332, Week 10
October 31, 2007
2
Topics
Memory Write Ability and Storage Permanence
Common Memory Types
Composing Memory
DRAM
3
Memory: Basic Concepts
Stores large number of bits
m x n: m words of n bits each
k = Log2(m) address input signals
or m = 2k words
e.g. 4,096 x 8 memory:
32,768 bits
12 address input signals
8 input/output data signals
Memory access
r/w: selects read or write
enable: read or write only when asserted
multiport: multiple accesses to different
locations simultaneously
m n memory
n bits per word
m words
enable
2k n read and write
memory
A0
r/w
Q0
Qn-1
Ak-1
memory external view
4
Write Ability
Ranges of write ability
High end
processor writes to memory simply and quickly
e.g. RAM
Middle range
processor writes to memory, but slower
e.g. FLASH, EEPROM
Lower range
special equipment, “programmer”, must be used to write to memory
e.g. EPROM, OTP ROM
Low end
bits stored only during fabrication
e.g., Mask-programmed ROM
In-system programmable memory
Can be written to by a processor in the embedded system using the
memory
Memories in high end and middle range of write ability
5
Storage Permanence
Range of storage permanence
High end
essentially never loses bits
e.g. mask-programmed ROM
Middle range
holds bits days, months, or years after memory’s power source turned off
e.g. NVRAM
Lower range
holds bits as long as power supplied to memory
e.g. SRAM
Low end
begins to lose bits almost immediately after written
e.g. DRAM
Nonvolatile memory
Holds bits after power is no longer supplied
High end and middle range of storage permanence
6
ROM: Read-Only Memory
Nonvolatile memory
Can be read from but not written to, by
a processor in an embedded system
Traditionally, “programmed” before
inserting to embedded system
Uses
Store software program for general-
purpose processor
program instructions can be one or
more ROM words
Store constant data needed by system
Implement combinational circuit
2k n ROM
Q0
Qn-1
A0
enable
Ak-1
External view
pf3
pf4

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1

ECE332, Week 10

October 31, 2007

2

Topics

 Memory Write Ability and Storage Permanence

 Common Memory Types

 Composing Memory

 DRAM

3

Memory: Basic Concepts

 Stores large number of bits

 m x n : m words of n bits each

 k = Log 2 ( m ) address input signals

 or m = 2k^ words

 e.g. 4,096 x 8 memory:

 32,768 bits

 12 address input signals

 8 input/output data signals

 Memory access

 r/w: selects read or write

 enable: read or write only when asserted

 multiport: multiple accesses to different

locations simultaneously

m  n memory

n bits per word

m^ words

enable

2 k^  n read and write memory

A (^0) …

r/w

Q (^) n-1 Q (^0)

A (^) k-

memory external view

4

Write Ability

 Ranges of write ability

 High end

 processor writes to memory simply and quickly

 e.g. RAM

 Middle range

 processor writes to memory, but slower

 e.g. FLASH, EEPROM

 Lower range

 special equipment, “programmer”, must be used to write to memory

 e.g. EPROM, OTP ROM

 Low end

 bits stored only during fabrication

 e.g., Mask-programmed ROM

 In-system programmable memory

 Can be written to by a processor in the embedded system using the

memory

 Memories in high end and middle range of write ability

5

Storage Permanence

 Range of storage permanence

 High end

 essentially never loses bits

 e.g. mask-programmed ROM

 Middle range

 holds bits days, months, or years after memory’s power source turned off

 e.g. NVRAM

 Lower range

 holds bits as long as power supplied to memory

 e.g. SRAM

 Low end

 begins to lose bits almost immediately after written

 e.g. DRAM

 Nonvolatile memory

 Holds bits after power is no longer supplied

 High end and middle range of storage permanence

6

ROM: Read-Only Memory

 Nonvolatile memory

 Can be read from but not written to, by

a processor in an embedded system

 Traditionally, “programmed” before

inserting to embedded system

 Uses

 Store software program for general-

purpose processor

 program instructions can be one or

more ROM words

 Store constant data needed by system

 Implement combinational circuit

2 k^  n ROM

Q (^) n-1 Q (^0)

A 0

enable

A k-

External view

7

Example: 8x4 ROM

 Horizontal lines = words

 Vertical lines = data

 Lines connected only at circles

 Decoder sets word 2’s line to 1 if

address input is 010

 Data lines Q 3 and Q 1 are set to 1

because there is a “programmed”

connection with word 2’s line

 Word 2 is not connected with data

lines Q 2 and Q 0

 Output is 1010

8  4 ROM

decoder

Q 3 Q 0

A 0

enable

A 2

word 0 word 1

A 1

Q 2 Q 1

programmable connection wired-OR

word line

data line

word 2

Internal view

8

Implementing Combinational Function

 Any combinational circuit of n functions of same k

variables can be done with 2 k^ x n ROM

Truth table Inputs (address) Outputs a b c y z 0 0 0 0 0 0 0 1 0 1 0 1 0 0 1 0 1 1 1 0 1 0 0 1 0 1 0 1 1 1 1 1 0 1 1 1 1 1 1 1

0 0 0 1 0 1 1 0 1 0 1 1 1 1 1 1 y z

c

enable

a

b

8 2 ROM word 0 word 1

word 7

9

Mask-Programmable ROM

 Connections “programmed” at fabrication

 set of masks

 Lowest write ability

 only once

 Highest storage permanence

 bits never change unless damaged

 Typically used for final design of high-volume

systems

 spread out NRE cost for a low unit cost

10

OTP ROM: One-Time Programmable ROM

 Connections “programmed” by user

 user provides file of desired contents of ROM

 file input to machine called ROM programmer

 each programmable connection is a fuse

 ROM programmer blows fuses where connections should

not exist

 Very low write ability

 typically written only once and requires ROM programmer

device

 Very high storage permanence

 bits don’t change unless reconnected to programmer and

more fuses blown

 Commonly used in final products

 cheaper, harder to inadvertently modify

11

EPROM: Erasable Programmable ROM

 Programmable component is a MOS

transistor

 Transistor has “floating” gate surrounded by an insulator  (a) Negative charges form a channel between source and drain storing a logic 1  (b) Large positive voltage at gate causes negative charges to move out of channel and get trapped in floating gate storing a logic 0  (c) (Erase) Shining UV rays on surface of floating-gate causes negative charges to return to channel from floating gate restoring the logic 1  (d) An EPROM package showing quartz window through which UV light can pass

 Better write ability

 can be erased and reprogrammed thousands

of times

 Reduced storage permanence

 program lasts about 10 years but is

susceptible to radiation and electric noise

 Typically used during design

development

(d)

(a)

(b) source^ drain

+15V

source drain

0V

(c)

source drain

floating gate

5-30 min

12

EEPROM: Electrically erasable

programmable ROM

 Programmed and erased electronically

 typically by using higher than normal voltage

 can program and erase individual words

 Better write ability

 can be in-system programmable with built-in circuit to provide

higher than normal voltage

 built-in memory controller commonly used to hide details

from memory user

 writes very slow due to erasing and programming

 “busy” pin indicates to processor EEPROM still writing

 can be erased and programmed tens of thousands of times

 Similar storage permanence to EPROM (about 10 years)

 Far more convenient than EPROMs, but more expensive

19

DRAM Integration Problem

 SRAM easily integrated on same chip as processor

 DRAM more difficult

 Different chip making process between DRAM and

conventional logic

 Goal of conventional logic (IC) designers:

 minimize parasitic capacitance to reduce signal propagation

delays and power consumption

 Goal of DRAM designers:

 create capacitor cells to retain stored information

 Integration processes beginning to appear

20

Memory Management Unit (MMU)

 Duties of MMU

 Handles DRAM refresh, bus interface and

arbitration

 Takes care of memory sharing among multiple

processors

 Translates logic memory addresses from

processor to physical memory addresses of

DRAM

 Modern CPUs often come with MMU built-in

21

Homework

 With DE2 User’s Guide, determine types of

memory on DE2 FPGA board

 Due: Monday 11/5/