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4 problems, 5 pages Exam Three 21 November 2002
Instructions: This is a closed book, closed note exam. Calculators are not permitted. If you have a question, raise your hand and I will come to you. If you finish early, please check your work until the bell rings so as not to disturb others that are still working. Please work the exam in pencil and do not separate the pages of the exam. For maximum credit, show your work. Good Luck!
Your Name ( please print ) ________________________________________________
1 2 3 4 total
4 problems, 5 pages Exam Three 21 November 2002
Problem 1 (3 parts, 28 points) Memory Systems
Imagine using a 16 Mbit DRAM organized as 2 million addresses of 8-bit words to build memory systems. The following three parts consider memory systems built using this chip.
Part A (10 points) Consider a memory system organized as 16 million addresses of 16-bit words.
number of chips needed in one bank number of banks for memory system
number of bits in address memory decoder required ( n to m ) number of DRAM chips required
capacity (in Mbits)
Part B (10 points) Consider a memory system organized as 2 million addresses of 32-bit words.
number of chips needed in one bank number of banks for memory system
number of bits in address number of DRAM chips required capacity (in Mbits)
Part C (8 points) Consider a memory system with 3 chips per bank and a 2-to-4 memory decoder.
number of addresses size of a word
capacity (in Mbits)
Problem 2 (1 part, 12 points) Instruction Formats
Suppose a datapath has three operand busses (two source, one destination) and it has the following I-type instruction format:
Opcode: 8 bits Destination register: 6 bits Source register: 6 bits Immediate: 12 bits
Determine the following parameters of this datapath.
maximum number of different opcodes
maximum number of registers in the register file
range of possible signed immediate values
minimum number of bits needed to specify an R-type instruction
4 problems, 5 pages Exam Three 21 November 2002
Problem 4 (4 parts, 30 points) Microcode
Use the data path discussed in class (and attached to the exam) to answer the following. For maximum credit, use the minimum number of microinstructions to code the answer. Put an “x” in fields that are “don’t cares”.
Part A (5 points) Write a microinstruction to divide the data value in register 3 by 8 and put the result in register 7. cycle X Y Z rwe im en im va au en -a/s lu en lf su en st ld en st en r/-w msel
Part B (10 points) Write a microcode fragment (1 or more microinstructions) that writes the value that is in register 4 to memory location 78. cycle X Y Z rwe im en im va au en -a/s lu en lf su en st ld en st en r/-w msel
Part C (10 points) Write a microcode fragment (1 or more microinstructions) that multiplies the value in register 6 by 5 and puts the result in register 9. cycle X Y Z rwe im en im va au en -a/s lu en lf su en st ld en st en r/-w msel
Part D (5 points) Under what conditions will this microinstruction cause register 8 to end up with a 0 as its value? In other words, what must be true about the source operand registers? cycle X Y Z rwe im en im va au en -a/s lu en lf su en st ld en st en r/-w msel 1 5 16 8 1 0 x 0 x 1 6 0 x 0 0 x 0
4 problems, 5 pages Exam Three 21 November 2002
memory
register
file
32 x 32
5 5 5
rwe
X Y Z
au en
-a/s
arithmetic
unit
sign extender
im en im va
lu en
logical
unit
lf 4
addr
data
r/-w msel
st en
ld en
shift types 0 = logical 1 = arithmetic 2 = rotate
logical functions X Y out 0 0 lf 0 1 0 lf 1 0 1 lf 2 1 1 lf 3
cycle cycle number X register driven onto X bus Y register driven onto Y bus Z register written from Z bus rwe register write enable im en immediate enable on Y bus im va immediate value
au en arithmetic unit enable -a/s -add / sub (0 = add, 1 = subtract) lu en logical unit enable lf logical function su en shift unit enable st shift type ld en load enable st en store enable r/-w read/-write (0 = write, 1 = read) msel memory select description operation description
su en
shift
unit
st 2
count
16
32
