ECE 2030 Fall 2008 Computer Engineering Final Exam, Exams of Computer Science

The instructions and problems for the ece 2030 computer engineering final exam held in fall 2008. The exam consists of five problems, each with multiple parts, and covers various topics such as digital logic design, microcode, and memory systems. Students are required to work in pencil, without calculators or notes, and must show their work for full credit.

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2012/2013

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ECE 2030 12:00pm Computer Engineering Fall 2008
5 problems, 7 pages Final Exam 10 December 2008
1
Instructions: This is a closed book, closed note exam. Calculators are not permitted. If you have
a question, raise your hand and I will come to you. Please work the exam in pencil and do not
separate the pages of the exam. For maximum credit, show your work.
Good Luck!
Your Name (please print) ________________________________________________
1 2 3 4 5 total
32 34 18 34 34 152
pf3
pf4
pf5

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5 problems, 7 pages Final Exam 10 December 2008

Instructions: This is a closed book, closed note exam. Calculators are not permitted. If you have

a question, raise your hand and I will come to you. Please work the exam in pencil and do not

separate the pages of the exam. For maximum credit, show your work.

Good Luck!

Your Name ( please print ) ________________________________________________

1 2 3 4 5 total

5 problems, 7 pages Final Exam 10 December 2008

Problem 1 (4 parts, 32 points) Implementation Bonanza

For each part implement the specified device. Label all inputs and outputs.

Part A (8 points) Implement the expression

below using N and P type switches.

OUTX = AB ⋅ ( C + D ) + E

Part B (8 points) Implement the expression in

mixed logic notation using NOR gates.

OUTY = ( A + B + C ) ⋅ D

Part B (8 points) Implement a 1 to 4 DEMUX

using only pass gates and inverters.

Part D (8 points) Implement a full adder using

AND, OR, NAND, NOR, NOT, & XOR gates.

5 problems, 7 pages Final Exam 10 December 2008

Problem 3 (2 parts, 18 points) Instruction Formats

Part A (9 points) Consider the instruction set architecture below with fields containing zeros.

opcode dest. reg. source 1 reg. immediate value

What is the maximum number of opcodes?

What is the number of registers?

What is the range of the signed immediate value?

Part B (9 points) List three differences between a branch and a jump in the MIPS ISA.

Problem 4 (4 parts, 34 points) State of the Union

Part A (7 points) Implement an RS latch with active high inputs, R and S. Use only basic gates

(AND, OR, NAND, NOR, and NOT). Label the inputs and output. Also complete the behavior

table. Note -Out means Out.

R S Out -Out

0 0

1 0

0 1

1 1

Part B (7 points) Expand the RS latch to a transparent latch and complete the truth table. Use

only basic gates (AND, OR, NAND, NOR, and NOT). Label the inputs and output. Also

complete the behavior table.

In En Out -Out

A 0

A 1

R

S

Out

Out

Out

R Out

S

RS

latch

O

O

En

In

5 problems, 7 pages Final Exam 10 December 2008

Part C (12 points) Build a register using two transparent latches plus a 2to1 mux (draw the

labeled icon), a pass gate, and an inverter. Again, complete the behavior table. Recall that the

CLK signal indicates a full Φ 1 Φ 2 cycle; so the output should be the value at the end of a cycle

(with the given inputs).

Out

In

φ 1 φ 2

In Out

En

Latch

In Out

En

Latch

WE RE

In WE RE Clk Out

A 0 0 ↑↓

A 1 0 ↑↓

A 0 1 ↑↓

A 1 1 ↑↓

Part D (8 points) Assume the following signals are applied to your register. Draw the output

signal Out. Draw a vertical line where In is sampled. Draw crosshatch where Out is unknown.

Φ 1

Φ 2

WE

In

Out

5 problems, 7 pages Final Exam 10 December 2008

memory

register file 32 x 32

5 5 5

rwe

X Y Z

au en

-a/s arithmetic unit

sign extender

im en im va

lu en

logical unit

lf 4

addr

data

r/-w msel

st en

ld en

shift types 0 = logical 1 = arithmetic 2 = rotate

  • count shifts right
  • count shifts left

logical functions X Y out 0 0 lf (^0) 1 0 lf (^1) 0 1 lf (^2) 1 1 lf (^3)

cycle cycle number X register driven onto X bus Y register driven onto Y bus Z register written from Z bus rwe register write enable im en immediate enable on Y bus im va immediate value

au en arithmetic unit enable -a/s -add / sub (0 = add, 1 = subtract) lu en logical unit enable lf logical function su en shift unit enable st shift type ld en load enable st en store enable r/-w read/-write (0 = write, 1 = read) msel memory select description operation description

su en

shift unit

st 2

count

16

32

instruction example meaning add add^ $1,$2,$3^ $1^ =^ $2^ +^ $ subtract sub^ $1,$2,$3^ $1^ =^ $2^ -^ $ add immediate addi^ $1,$2,100^ $1^ =^ $2^ +^100 multiply mul^ $1,$2,$3^ $1^ =^ $2^ ^ $ divide div^ $1,$2,$3^ $1^ =^ $2^ /^ $ and and^ $1,$2,$3^ $1^ =^ $2^ &^ $ or or $1,$2,$3 $1 = $2 | $ xor xor $1,$2,$3 $1 = $2 xor $ and immediate andi $1,$2,100 $1 = $2 & 100 or immediate ori $1,$2,100 $1 = $2 | 100 xor immediate xori $1,$2,100 $1 = $2 xor 100 shift left logical sll $1,$2,5 $1 = $2 << 5 (logical) shift right logical srl $1,$2,5 $1 = $2 >> 5 (logical) shift left arithmetic sla $1,$2,5 $1 = $2 << 5 (arithmetic) shift right arithmetic sra $1,$2,5 $1 = $2 >> 5 (arithmetic) load word lw $1, ($2) $1 = memory [$2] store word sw $1, ($2) memory [$2] = $ load upper immediate lui $1,100 $1 = 100 x 2 16 branch if equal beq $1,$2,100 if ($1 = $2), PC = PC + 4 + (1004) branch if not equal bne $1,$2,100 (^) if ($1 ≠ $2), PC = PC + 4 + (100*4) set if less than slt $1, $2, $3 if ($2 < $3), $1 = 1 else $1 = 0 set if less than immediate slti $1, $2, 100 if ($2 < 100), $1 = 1 else $1 = 0 jump j 10000 PC = 10000 jump register jr $31 PC = $ jump and link jal 10000 $31 = PC + 4; PC = 10000