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This course focuses on quantitative principle of computer design, instruction set architectures, datapath and control, memory hierarchy design, main memory, cache, hard drives, multiprocessor architectures, storage and I/O systems, computer clusters. This lecture includes: Merging, Buffer, Multiword, Modified, Data, Block, Victim, Cache, Fetched, Penalty
Typology: Slides
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- Multiword writes are usually faster than writes performed one at a time - Writes usually modify one word in a block; Thus ….. If a write buffer already contains some words from the given data block we will merge current modified word with the block parts already in the buffer
That is, If the buffer contains other modified blocks the address can be checked to see if the address of this new data matches the address of valid write buffer entry Then the new data are combined with the existing entry - it is called Write Merge
….. checked on another miss to see if they have the desired data before going to the next lower-level memory If the desired data (or instruction) is found then the victim block and cache block are swapped This recycling requires small fully associative cache between a cache and its refill path - called the victim cache as shown in the following figure
Placement of victim cache in memory hierarchy Cache
The second technique , “ Critical Word First and Early Restart‟ , is the intolerance
The third method, „priority to read miss over the write miss‟, is the favoritism The fourth technique , „ merging write- buffer, ”is acquaintance
Miss penalty; however, the first one – multi level caches, are the most important and efficient However, reducing miss rate and hit rate to improve the memory hierarchy performance are also important metrics We will take up these metrics next time
- till then
