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intel. 8255A/8255A-5 PROGRAMMABLE PERIPHERAL INTERFACE @ MCS-85T™ Compatible 8255A-5 w Direct Bit Set/Reset Capability Easing m 24 Programmabie 1/0 Pins Control Application Interface mw Completely TTL Compatibie . mw Reduces System Package Count m@ Fully Compatible with (ntei m@ Improved DC Driving Capability Microprocessor Families @ Avaliable in EXPRESS @ Improved Timing Characteristics — Standard Temperature Range — Extended Temperature Range m@ 40 Pin DIP Package (See Intel Packaging: Order Number: 240800-001, Package Type °} The Intel 82554 is a general purpose programmable I/O device designed for use with Intel microprocessors. it has 24 1/O pins which may be individually programmed in 2 groups of 12 and used in 3 major modes of operation. In the first mode (MODE 0), each group of 12 I/O pins may be programmed in sets of 4 to be input or output. In MODE 1, the second mode, each group may be programmed to have 8 lines of input or output. Of the remaining 4 pins, 3 are used for handshaking and interrupt control signals. The third mode of operation (MODE 2) is a bidirectional bus mode which uses 8 lines for a bidirectional bus, and 5 lines, borrowing one from the ather group, for handshaking. on. { oa oe TF ono — Kk v the fh me Comer eC]? afm T mt} ape nae >pw 1 ed: «Bm Or ads 36 [0] mwser Kore KO nee, oe? =p seowecrous or = og "Be oe COD) oS Ko mr gogsq Ele i = reotqn =p mere 5 \ rote aba 1 — >) Si fete Za! =H. eco} el» { te =D vee I vot] aber =———+4 eso rote ~Om a7 — 7 Nore ono nou wt] =P} me fy coma, [J ce Keb, ord zp ~»—-| ~ =U] nD =“ uW 291308-2 Lo Figure 2. Pin Contiguration a—__| 231308-1 Figure 1. 8255A Block Diagram August 1961 3-100 Order Number: 231308-003 www.chipdocs.com Be sure to visit ChipDocs web site for more information. 
