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1. Explain the architecture of 8086 processors with neat block diagram
Internal architecture of 8086:
•8086 has two blocks
- BIU Bus interface unit and
- EU Execution unit.
BIU Bus interface unit:
•The BIU handles all transactions of data and addresses on the buses for EU. •The BIU performs all bus operations such as instruction fetching, reading and writing operands for memory and calculating the addresses of the memory operands. The instruction bytes are transferred to the instruction queue. •BIU contains Instruction queue, Segment registers, Instruction pointer, Address adder. Segment Registers
The BIU contains four 16-bit segment registers. They are: the extra segment (ES) register, the code segment (CS) registers, the data segment (DS) registers, and the stack segment (SS) registers. These segment registers are used to hold the upper 16 bits of the starting address for each of the segments. The part of a segment starting address stored in a segment register is often called the segment base.
1. Code Segment (CS): The CS register is used for addressing a memory location in the Code Segment of the memory, where the executable program is stored. 2. Data Segment (DS): The DS contains most data used by program. Data are accessed in the Data Segment by an offset address or the content of other register that holds the offset address. 3. Stack Segment (SS): SS defined a section of memory to store addresses and data while a subprogram executes. 4. Extra Segment (ES): ES is additional data segment that is used by some of the string to hold the extra destination data.
Fig. 2: Memory Segments of 8086 Instruction Pointer (IP) In the BIU, the next register, below the segment register is instruction pointer. The instruction pointer (IP) holds the 16-bit address of the next code byte within this code segment.
EU Execution unit:
- The execution unit (EU) tells the BIU where to fetch instructions or data from, decodes instructions, and executes instructions.
- The functional parts of the execution unit are control circuitry or system, instruction decoder, and Arithmetic logic unit (ALU).
- Control circuitry to perform various internal operations. A decoder in the EU translates instructions fetched from memory to generate different internal or external control signals that required performing the operation.
- The EU has a 16-bit ALU, which can perform arithmetic operations such as add, subtract etc. and logical operations such as AND, OR, XOR, increment, decrement etc.
- Trans receivers are the bidirectional buffers and sometimes they are called as data amplifiers. They are required to separate the valid data from the time multiplexed address/data signals.
- They are controlled by two signals namely, DEN and DT/R.
- (^) The DEN signal indicates the direction of data, i.e. from or to the processor. The system contains memory for the monitor and users program storage.
- Usually, EPROM are used for monitor storage, while RAM for users program storage. A system may contain I/O devices.
b) Draw the timing diagram for memory write cycle in maximum mode operation of 8086 processor
3. Explain the Stack structure of 8086. 1. The stack in the 8086/8088 microprocessor, like that in many microprocessors, is a region of memory that can store information for later retrieval. It is called a stack, because you "stack" things on it. The philosophy is that you retrieve (pop) things in the opposite order of storing (push) them. 2. In the 8086/8088, the stack pointer is SS:SP, which is a 16 bit pointer into a 20 bit address space. It, at any point of time, points to the last item pushed on the stack. If the stack is empty, it points to the highest address of the stack plus one.
3. In a push operation, the SP register is decremented by two, and the data to be pushed is stored at that address, low order byte first. 4. In a pop operation, the data to be popped is retrieved from that address, again low order byte first, and then the SP register is incremented by two. 5. Some instructions, such as a FAR CALL, or FAR RETURN push or pop more than two bytes on the stack. 6. It is also possible to allocate temporary storage on the stack. You simply decrement the SP register by some amount, use that memory, and then increment the SP register to release the memory. This is known as a stack frame. In fact, the BP register makes is very easy to do so. You use BP to separate arguments from local data - arguments will be above BP, and local data will be below BP. Memory reference instructions that are relative to BP, i.e. [BP+6] or [BP-48] will automatically use the SS segment register. 4. What are the salient features of 80486 processor explain its architecture with neat block diagram.
- (^) The 80486 microprocessor is an improved version of the 80386 microprocessor that contains an 8K-byte cache and an 80387 arithmetic co processor; it executes many instructions in one clocking period.
- The 80486 microprocessor executes a few new instructions that control the internal cache memory.
- A new feature found in the 80486 in the BIST (builtin self-test) that tests the microprocessor, coprocessor, and cache at reset time.
- If the 80486 passes the test, EAX contains a zero.
- Additional test registers are added to the 80486 to allow the cache memory to be tested.
- These new test registers are TR3 (cache data), TR4 (cache status), and TR5 (cache control)
Architecture of 80486 processor
♦ The paging unit provides the paging facility within a segment. It translates the linear address into the physical address.
9) a) Discuss the general functions of all general purpose registers of 8086? Explain the special function of each register nd instruction support for these functions.
A) General Purpose Registers:
8086 has a powerful set f registers know as general purpose and special registers. All of them are 16-bit registers. The general purpose registers, can be used as either 8-bit registers or 16-bit registers. They may be either used for holding data, variables and intermediate results temporarily or for other purpose like a counter or for storing offset address for some particular addressing modes etc. The special purpose registers are used as segment registers, pointers, index registers or as offset storage registers for particular addressing modes.
♦ 8086 microprocessors have four general purpose registers namely, AX, BX, CX, DX. ♦ (^) All these registers are 16 – bit registers. However, each register can be used as two general-purpose byte registers also. ♦ These byte registers are named AH and AL for AX, BH and BL for BX, CH and CL for CX, and DH and DL for DX. The H in register name represents higher byte while L represents lower byte of the 16 bits registers. ♦ These registers are primarily used for general computation purposes. However, in certain instruction executions they acquire a special meaning.
AX register is also known as accumulator. Some of the instructions like divide, rotate, shift etc. require one of the operands to be available in the accumulator. Thus, in such instructions, the value of AX should be suitably set prior to the instruction.
BX register is mainly used as a base register. It contains the starting base location of a memory region within a data segment.
CX register is a defined counter. It is used in loop instruction to store loop counter.
DX register is used to contain I/O port address for I/O instruction.
b) Discuss the system bus cycle of 8086 with a neat diagram? What is the use of wait cycles? Compare wait and idle cycles.
A) The 8086 operates in time periods called bus cycles. Each bus cycle requires 4clock cycles to complete. Therefore, the bus cycle is completed very 800 ns. A typical bus cycle is shown in fig
1. One cycle of this is referred to as a state. A state is measured from the 50 percent point on the falling edge of one clock pulse to 50 percent point on the falling edge of the next clock pulse- T 1 in the figure is a state. 2. Each basic bus operation such as reading a byte from memory or writing a word to a port requires some number of states. The group of states required for a basic bus operation is called a machine cycle 3. The total time it takes the 8086 to fetch and execute an instruction is called an instruction cycle 4. An instruction cycle consists of one or more machine cycles. To summarize, an instruction cycle is made up of machine cycles, and a machine cycle is made up of states. - Idle State:
