Midterm Exam with Answer for Computing Architect Principles | CDA 5155, Exams of Electrical and Electronics Engineering

Material Type: Exam; Class: COMPU ARCHITECT PRIN; Subject: COMPUTER DESIGN/ARCHITECTURE; University: University of Florida; Term: Unknown 1989;

Typology: Exams

Pre 2010

Uploaded on 03/13/2009

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1. For a typical workload, the percentages of three groups of instructions and their average
CPI are given in the following table.
Instruction Percentage CPI
Integer 50 1
Load/Store 30 3
Floating-point 20 10
There are two possible ways to make performance improvement. First, an enhanced
compiler can reduce the floating-point instructions to ½ of the original floating-point
instructions with the cost of increasing the integer instructions by 30% of the original
integer instructions. Second, a new pipeline technique can reduce the average CPI of the
floating-point instruction from 10 to 5 without increasing the clock cycle time. Compare the
performance improvement of the two solutions. Calculate which solution is better and by
how much.
Answer:
First enhancement:
Percentage Adjusted % CPI
Integer 50*(1+30%)=65 65/105=61.9 1
Load/Store 30 30/105=28.6 3
Floating P 20*1/2 = 10 10/105=9.5 10
CPI = 61.9%*1 + 28.6%*3 + 9.5%*10 = 2.427
Second enhancement:
CPI = 50%*1 +30%*3 + 20%*5 = 2.4
.
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  1. For a typical workload, the percentages of three groups of instructions and their average CPI are given in the following table. Instruction Percentage CPI Integer 50 1 Load/Store 30 3 Floating-point 20 10 There are two possible ways to make performance improvement. First, an enhanced compiler can reduce the floating-point instructions to ½ of the original floating-point instructions with the cost of increasing the integer instructions by 30% of the original integer instructions. Second, a new pipeline technique can reduce the average CPI of the floating-point instruction from 10 to 5 without increasing the clock cycle time. Compare the performance improvement of the two solutions. Calculate which solution is better and by how much. Answer: First enhancement: Percentage Adjusted % CPI Integer 50(1+30%)=65 65/105=61.9 1 Load/Store 30 30/105=28.6 3 Floating P 201/2 = 10 10/105=9.5 10 CPI = 61.9%1 + 28.6%3 + 9.5%10 = 2. Second enhancement: CPI = 50%1 +30%3 + 20%5 = 2. .
  1. The execution cycles for various instructions are given in the following table. All units are pipelined. Loads and stores require Integer ALU for address generations at the “Execute” stage and the memory unit at the “Memory” stage Instruction Cycle Number of Unit

Integer ALU 1 1 load/store 2 1 (memory unit) ADDD/SUBD 3 1 MULD/DIVD 7 1


Simulate the execution of a code segment in the provide tables. Both executions are on two- issue dynamic-scheduling pipeline microarchitectures with and without speculations. Note that both microarchitectures include a reorder buffer (infinite size) to enforce in-order commit with up to 2 commits per cycle, and both are equipped with 2 parallel CDBs for 2 concurrent writebacks. In both microarchitectures, store does not access memory until commit. Iter. Instruction Issue Execute Memory Wr-CDB Commit 1 LD^ F3,0(R1)^1 2 3 5 1 MULD^ F10,F3,F0^1 6 13 1 ADDD^ F12,F9,F10^2 14 17 1 SD^ 0(R1),F12^2 3 1 ADDIU R1,R1,#8^3 4 5 1 BNEZ^ R1,LOOP^3 6 2 LD^ F3,0(R1)^4 7 8 10 2 MULD^ F10,F3,F 2 ADDD^ F12,F9,F 2 SD^ 0(R1),F 2 ADDIU R1,R1,# 2 BNEZ^ R1,LOOP Part 1 - Simulating Execution without Speculation