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Mixed logic design is a gate-level design methodology used in industry that separates what a circuit does from how it does it, allowing for self-documenting circuits. It uses demorgan's theorem to implement logic functions using and and or gates and vertical bars to represent complements. This design methodology provides flexibility in implementing circuits using different gate types and supports self-documenting circuits.
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Mixed logic is a gate-level design methodology used in industry. It allows a digital logic circuit designer the functional description of the circuit from its physical implementation. For example, consider the function: F = A · B
This is a functional description. Two possible physical implementations are listed below, one using a NAND gate and inverters, the other using a NOR gate and inverters:
A B
Both of the above circuits implement the same function, but are different physical implementations. Which is easier to read? Ideally, the implementation of the circuit should not affect your ability to figure out what the circuit does. The goal of mixed logic design is to:
Before getting into the details of how to design a mixed-logic circuit, let us modify the circuit of the preceeding example to see how mixed-logic notation works. Using mixed-logic notation, the above cir- cuits are now illustrated as:
A B
Note the vertical bars with the bubbles in both circuits. They do not represent physical circuit elements
(a) Read all NANDs and ANDs as ANDs ; (b) read all NORs and ORs as ORs ; and (c) ignore all inverters.
Thus when reading the circuit left to right, a bar should exist everywhere that a complement exists in the corresponding logic equation. By not worry about everywhere a physical inversion takes place, it is much easier to read the function implemented by the circuit.
In both examples above, A is complemented yielding A. Ignoring all inverters and treating both logic gates as an AND, the output of the gate is AB. Inverting the output by the vertical bar after the logic gates results in AB.
Mixed logic design is based on the key observation of DeMorgan’s theorem: logical operations have equivalencies when their inputs and outputs are inverted. DeMorgan’s square, shown below, illustrates the equivalencies of the four basic gate types.
invert output
invert input
Inverting the output of the gate moves horizontally in the square. Moving vertically is accomplished by inverting all gate inputs (turning the truth table upside down).
Each of the four fundamental gates types has both an AND-based and OR-based functional equivalency, based on DeMorgan’s theorem. You have already seen this for NAND and NOR gates, but it applies to AND and OR gates as well. While it may seem counterintuitive to draw an AND gate as an OR body with inverted inputs and outputs, this variation makes mixed logic design possible.
Now let’s design it using just NAND gates and inverters.
A B C
F
A B C
F
(a) another bubble on a logic gate ; or (b) a bubble on a vertical bar. A B C
F
You’re done! You’ve now implemented the circuit using 2 NAND gates and 3 inverters, which requires 14 transistors (4 each for the NAND gates, 2 each for the inverters). The circuit is also self-documenting, in that by ignoring the inverters and bubbles on the gates and just paying attention to the vertical bars, you can easily read off the function being implemented.
The figure below shows 4 different circuit implementations of this function, each using a different type of gate (NAND, NOR, AND, OR). All circuits implement the same function. The first is the example that you just saw. Also shown with each circuit is the transistor count for that particular implementation.
A B C
F
A B C
F
A B C
F
A B C
F
NAND (14)
NOR (14)
AND (18)
OR (14)
Note that three of the four circuits have similar transistor counts, while the AND-based implementation requires more. Why would you choose a particular implementation? There are three general reasons.
Consider implementing the function
F = (A + B) · (C + D)
using just NOR gates.
Again, the form of the functional expression is independent of implementation. First represent the func- tion graphically:
Thanks to mixed-logic notation, it is relatively easy to extract the implemented function. Reading the circuit from left to right, ignoring all bubble and complementing where vertical bars occur:
F = (A + (B · C)) · ((B · C) + D)
The fact that this implementation includes only NOR gates neither changes nor distorts the behavior of the circuit. Not the common subexpression ((B · C) used in two places in the circuit. When bubbles are added to an output wire that is used in multiple places ( fanout > 1), multiple bubbles on the “consumer- end” must be added to match the bubble on the “producer-end.” This can be seen when this circuit is re-implemented using just NAND gates.
A
B C
D
F
In summary, mixed logic design: