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A step-by-step guide on implementing a packet-transmit capability with the intel 82573l network interface controller using linux kernel. It covers topics such as writing a 'write()' routine, using kzalloc() function, handling transmit-descriptors, and configuring the nic. Students and professionals interested in network driver development can benefit from this document.
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$ echo Hello > /dev/uart $ _ $ cat /dev/uart Hello _
Transmitting… Receiving…
This function will program the actual data-transfer
This function will allow us to inspect the transmit-descriptors
This function will detect and configure the hardware, define page-mappings, allocate and initialize the descriptors, start the ‘transmit’ engine, create the pseudo-file and register ‘my_fops’
This function will do needed ‘cleanup’ when it’s time to unload our driver – turn off the ‘transmit’ engine, free the memory, delete page-table entries, the pseudo-file, and the ‘my_fops’
‘struct’ holds one function-pointer
void kmem = kmalloc ( region_size, GFP_KERNEL ); memset ( kmem, 0x00, region_size ); / can be replaced with */ void *kmem = kzalloc ( region_size, GFP_KERNEL );
descriptor 0
Our ‘reusable’ transmit-buffer (1536 bytes)
descriptor 1 descriptor 2 descriptor 3 descriptor 4 descriptor 5 descriptor 6 descriptor 7 one packet-buffer Array of 8 transmit-descriptors
After writing the data into our packet-buffer, and writing its length to the the current TAIL descriptor, our driver will advance the TAIL index; the NIC responds by reading the current HEAD descriptor, fetching its data, then advancing the HEAD index as it sends our data out over the wire.
Device Control Extended Device Control
Transmit Inter-Packet Gap
Transmit Control
Transmit Descriptor-queue Base-Address (LOW)
Transmit Descriptor-queue Base-Address (HIGH)
Transmit Descriptor-queue Length
Transmit Descriptor-queue HEAD
Transmit Descriptor-queue TAIL
Transmit Descriptor-queue Control
special
0x
0x
0x
0xC
Buffer-Address high (bits 63..32)
Buffer-Address low (bits 31..0)
31 0
CSO Packet Length (in bytes)
CSS reserved=0 status
Buffer-Address = the packet-buffer’s 64-bit address in physical memory Packet-Length = number of bytes in the data-packet to be transmitted CMD = Command-field CSO/CSS = Checksum Offset/Start (in bytes) STA = Status-field
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R =
IPG After Deferral (Recommended value = 7)
IPG Part 1 (Recommended value = 8)
IPG Back-To-Back (Recommended value = 8)
IPG = Inter-Packet Gap
This register controls the Inter-Packet Gap timer for the Ethernet controller.
Note that the recommended TIPG register-value to achieve IEEE 802. compliant minimum transfer IPG values in full- and half-duplex operations would be 00702008 (hexadecimal), equal to (7<<20) | (8<<10) | (8<<0).
=
=
=
=
SW XOFF
COLD (upper 6-bits) (COLLISION DISTANCE)
COLD (lower 4-bits) (COLLISION DISTANCE)^0 ASDV
I L O S
TBI mode
P S P
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R =
E N
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
CT (COLLISION THRESHOLD)
EN = Transmit Enable SWXOFF = Software XOFF Transmission PSP = Pad Short Packets RLTC = Retransmit on Late Collision CT = Collision Threshold (=0xF) UNORTX = Underrun No Re-Transmit COLD = Collision Distance (=0x3F) TXCSCMT = TxDescriptor Minimum Threshold MULR = Multiple Request Support