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MICROPROCESSOR - 8086 FUNCTIONAL UNITS MICROPROCESSOR - 8086 FUNCTIONAL UNITS
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8086 Microprocessor is divided into two functional units, i.e., EU and BIU.
EU
Execution unit gives instructions to BIU stating from where to fetch the data and then decode and execute those instructions. Its function is to control operations on data using the instruction decoder & ALU. EU has no direct connection with system buses as shown in the above figure, it performs operations over data through BIU.
Let us now discuss the functional parts of 8086 microprocessors.
ALU
It handles all arithmetic and logical operations, like +, โ, ร, /, OR, AND, NOT operations.
Flag Register
It is a 16-bit register that behaves like a flip-flop, i.e. it changes its status according to the result stored in the accumulator. It has 9 flags and they are divided into 2 groups โ Conditional Flags and Control Flags.
Conditional Flags
It represents the result of the last arithmetic or logical instruction executed. Following is the list of conditional flags โ
Carry flag โ This flag indicates an overflow condition for arithmetic operations.
Auxiliary flag โ When an operation is performed at ALU, it results in a carry/barrow from lower nibble to upper nibble , then this flag is set, i.e. carry given by D3 bit to D4 is AF flag. The processor uses this flag to perform binary to BCD conversion.
Parity flag โ This flag is used to indicate the parity of the result, i.e. when the lower order 8-bits of the result contains even number of 1โs, then the Parity Flag is set. For odd number of 1โs, the Parity Flag is reset.
Zero flag โ This flag is set to 1 when the result of arithmetic or logical operation is zero else it is set to 0.
Sign flag โ This flag holds the sign of the result, i.e. when the result of the operation is negative, then the sign flag is set to 1 else set to 0.
Overflow flag โ This flag represents the result when the system capacity is exceeded.
Control Flags
Control flags controls the operations of the execution unit. Following is the list of control flags โ
Trap flag โ It is used for single step control and allows the user to execute one instruction at a time for debugging. If it is set, then the program can be run in a single step mode.
ExecutionUnit BusInterfaceUnit
ExecutionUnit
i. e. D 0โ D 3 i. e. D 4โ D 7
Interrupt flag โ It is an interrupt enable/disable flag, i.e. used to allow/prohibit the interruption of a program. It is set to 1 for interrupt enabled condition and set to 0 for interrupt disabled condition.
Direction flag โ It is used in string operation. As the name suggests when it is set then string bytes are accessed from the higher memory address to the lower memory address and vice-a-versa.
General purpose register
There are 8 general purpose registers, i.e., AH, AL, BH, BL, CH, CL, DH, and DL. These registers can be used individually to store 8-bit data and can be used in pairs to store 16bit data. The valid register pairs are AH and AL, BH and BL, CH and CL, and DH and DL. It is referred to the AX, BX, CX, and DX respectively.
AX register โ It is also known as accumulator register. It is used to store operands for arithmetic operations.
BX register โ It is used as a base register. It is used to store the starting base address of the memory area within the data segment.
CX register โ It is referred to as counter. It is used in loop instruction to store the loop counter.
DX register โ This register is used to hold I/O port address for I/O instruction.
Stack pointer register
It is a 16-bit register, which holds the address from the start of the segment to the memory location, where a word was most recently stored on the stack.
BIU
BIU takes care of all data and addresses transfers on the buses for the EU like sending addresses, fetching instructions from the memory, reading data from the ports and the memory as well as writing data to the ports and the memory. EU has no direction connection with System Buses so this is possible with the BIU. EU and BIU are connected with the Internal Bus.
It has the following functional parts โ
Instruction queue โ BIU contains the instruction queue. BIU gets upto 6 bytes of next instructions and stores them in the instruction queue. When EU executes instructions and is ready for its next instruction, then it simply reads the instruction from this instruction queue resulting in increased execution speed.
Fetching the next instruction while the current instruction executes is called pipelining.
Segment register โ BIU has 4 segment buses, i.e. CS, DS, SS& ES. It holds the addresses of instructions and data in memory, which are used by the processor to access memory locations. It also contains 1 pointer register IP, which holds the address of the next instruction to executed by the EU.
CS โ It stands for Code Segment. It is used for addressing a memory location in the code segment of the memory, where the executable program is stored.
DS โ It stands for Data Segment. It consists of data used by the program andis accessed in the data segment by an offset address or the content of other register that holds the offset address.
SS โ It stands for Stack Segment. It handles memory to store data and addresses during execution.
BusInterfaceUnit
