Objectives on Microprocessor-Based Systems - Project 2 | ECE 424, Study Guides, Projects, Research of Electrical and Electronics Engineering

Material Type: Project; Class: Microprocessor-Based Systems; Subject: Electrical & Computer Engr.; University: Southern Illinois University Carbondale; Term: Unknown 1989;

Typology: Study Guides, Projects, Research

Pre 2010

Uploaded on 02/24/2010

koofers-user-0d5
koofers-user-0d5 🇺🇸

10 documents

1 / 2

Toggle sidebar

This page cannot be seen from the preview

Don't miss anything!

bg1
ECE424 Microprocessor Sub-Project 2
1 Objectives
In this sub project, memory systems (including EPROM 2764 and SRAM 6264) are added into
the single-board computer.
Map EPROM (2764) to addressing space (FE000H-FFFFFH)
Map SRAM (6264) to addressing space (00000H-01FFFH)
Use 74HC138 to implement a partial decoding circuit for the above address mapping. (Hint: A15,
A14, A13 are the inputs of the decoding circuit.)
In this sub project, the following chips are wire wrapped:
1. 2764 EPROM
2. 6264 (8264) SRAM
3. 74HC138
2 Instructions
1. Draw the schematic that clearly indicates the connection for each pin of the chips used in the
subsystem
2. Make sure you follow the wire color map, connection rules, and board layout
3. Make sure you use by-pass capacitors for all the ICs
Turn Power Off Whenever You Put or RemoveAny Component (Especially EPROM)!
1
pf2

Partial preview of the text

Download Objectives on Microprocessor-Based Systems - Project 2 | ECE 424 and more Study Guides, Projects, Research Electrical and Electronics Engineering in PDF only on Docsity!

ECE424 Microprocessor Sub-Project 2

1 Objectives

In this sub project, memory systems (including EPROM 2764 and SRAM 6264) are added into the single-board computer.

  • Map EPROM (2764) to addressing space (FE000H-FFFFFH)
  • Map SRAM (6264) to addressing space (00000H-01FFFH)

Use 74HC138 to implement a partial decoding circuit for the above address mapping. ( Hint: A15, A14, A13 are the inputs of the decoding circuit.)

In this sub project, the following chips are wire wrapped:

1. 2764 EPROM

2. 6264 (8264) SRAM

3. 74HC

2 Instructions

  1. Draw the schematic that clearly indicates the connection for each pin of the chips used in the subsystem
  2. Make sure you follow the wire color map, connection rules, and board layout
  3. Make sure you use by-pass capacitors for all the ICs

Turn Power Off Whenever You Put or Remove Any Component (Especially EPROM)!

3 Demonstration

  1. Write the following binary code into the specified locations of the EPROM. You can find instructions for writing binary code into EPROMs in the ECE Lab.

Address Binary Code 01FF0H B 01FF1H 03 01FF2H 00 01FF3H 8E 01FF4H D 01FF5H A 01FF6H 00 01FF7H 01 01FF8H A 01FF9H 00 01FFAH 01 01FFBH EB 01FFCH FB

The above binary code is the machine code of the following assembly program. The binary code is stored in the memory locations from FFFF0 to FFFFC in your single board computer.

MOV AX, 0003H

MOV DS, AX

MOV [0100H], AL

L: MOV AL, [0100H]

JMP L

  1. After you program the EPROM, put it onto your system. Use Logic Analyzer to observe the read operations for EPROM and SRAM chips: - EPROM Read Operation: Probe data outputs O[7:0], address inputs A[3:0], OE, and CE of EPROM and CLK and ALE of 8088. From the waveforms of these signals, you should be able to see when read operations are performed for the EPROM. If your circuit functions properly, the following data should periodically appear at O[7:0]. Their corresponding addresses (A[3:0]) are alos listed below: Between these EPROM

A[3:0] 8 9 A B C O[7:0] A0 00 01 EB FB

read operations, SRAM read operations should be performed. How to probe SRAM read operations is described in the following.

  • SRAM Read Operation: Probe data outputs DQ[7:0], A[3:0], E 1 , and G of SRAM and CLK and ALE of 8088. Identify when SRAM read operations occur. The data (DQ[7:0]) read out from the SRAM should be 03 and its corresponding address (A[3:0]) should be 30H.