Docsity
Docsity
Prepare for your exams
Prepare for your exams

Study with the several resources on Docsity

Earn points to download
Earn points to download

Earn points by helping other students or get them with a premium plan

Guidelines and tips
Guidelines and tips
Sell on Docsity
Sell on Docsity
Docsity AI
Docsity AI
Log inSign up

Prepare for your exams

Study with the several resources on Docsity

Find documents

Prepare for your exams with the study notes shared by other students like you on Docsity

Search for your university

Find the specific documents for your university's exams

Docsity AINEW

Summarize your documents, ask them questions, convert them into quizzes and concept maps

Explore questions

Clear up your doubts by reading the answers to questions asked by your fellow students

Earn points to download

Earn points by helping other students or get them with a premium plan

Share documents
download point icon20 Points

For each uploaded document

Answer questions
download point icon5 Points

For each given answer (max 1 per day)

All the ways to get free points
Get points immediately

Choose a premium plan with all the points you need

Study Opportunities

Choose your next study program

Get in touch with the best universities in the world. Search through thousands of universities and official partners

Community

Ask the community

Ask the community for help and clear up your study doubts

Free resources

Our save-the-student-ebooks!

Download our free guides on studying techniques, anxiety management strategies, and thesis advice from Docsity tutors

Physics: Semiconductor class 12, Study notes of Physics

Physics

Semiconductor class 12. Based on NCERT. Complete notes with brief diagrams and elaborations.

Typology: Study notes

2025/2026

Available from 03/22/2026

sneha-priyadarshini
sneha-priyadarshini 🇮🇳

1 document

1 / 40

Toggle sidebar

This page cannot be seen from the preview

Don't miss anything!

bg1
Er. Ujwal Kumar (Physics Mentor for NEET/ JEE-Mains, Adv/ KVPY/OLYMPIAD/CBSE)
352
CLASS – 12
WORKSHEET- SEMICONDUCTOR DEVICES AND DIGITAL CIRCUITS
A. SEMICONDUCTOR MATERIAL
(1 Mark Questions)
1. Give the ratio of holes and the number of conduction electrons in an intrinsic
semiconductor.
Sol. The ratio of the number of holes to the number of conduction electrons in an intrinsic
semiconductor is 1.
2. How does the forbidden energy gap of an intrinsic semiconductor vary with increase in
temperature?
Sol. As we increase the temp, electrons from the top of the valence band would gain thermal
energy and gets excited into the C.B, so band gap would decrease with increase in temp.
Hence forbidden energy gap of a semiconductor decreases with increase in temperature.
3. How does the energy gap in an intrinsic semiconductor vary, when doped with a
pentavalent impurity?
Sol. When an intrinsic semiconductor is doped with the impurity atoms of valence five like
As, P or Sb, some addition energy levels are produced, situation in the energy gap
slightly below the conduction band which are called donor energy levels. Due to
it, energy gap in semiconductor decreases
4. Is the ratio of number of holes and number of conduction electrons in a p-type
semiconductor more than, less than or equal to 1?
Sol. The ratio of number of holes and number of conduction electrons in a p-type
semiconductor is less than 1.
5. Draw the energy band diagram of p-type semiconductor
Sol.
6. Draw the energy band diagram of n-type semiconductor
pf3
pf4
pf5
pf8
pf9
pfa
pfd
pfe
pff
pf12
pf13
pf14
pf15
pf16
pf17
pf18
pf19
pf1a
pf1b
pf1c
pf1d
pf1e
pf1f
pf20
pf21
pf22
pf23
pf24
pf25
pf26
pf27
pf28

Partial preview of the text

Download Physics: Semiconductor class 12 and more Study notes Physics in PDF only on Docsity!

CLASS – 12

WORKSHEET- SEMICONDUCTOR DEVICES AND DIGITAL CIRCUITS

A. SEMICONDUCTOR MATERIAL

(1 Mark Questions)

  1. Give the ratio of holes and the number of conduction electrons in an intrinsic semiconductor. Sol. The ratio of the number of holes to the number of conduction electrons in an intrinsic semiconductor is 1.
  2. How does the forbidden energy gap of an intrinsic semiconductor vary with increase in temperature? Sol. As we increase the temp, electrons from the top of the valence band would gain thermal energy and gets excited into the C.B, so band gap would decrease with increase in temp. Hence forbidden energy gap of a semiconductor decreases with increase in temperature.
  3. How does the energy gap in an intrinsic semiconductor vary, when doped with a pentavalent impurity? Sol. When an intrinsic semiconductor is doped with the impurity atoms of valence five like As, P or Sb, some addition energy levels are produced, situation in the energy gap slightly below the conduction band which are called donor energy levels. Due to it, energy gap in semiconductor decreases
  4. Is the ratio of number of holes and number of conduction electrons in a p-type semiconductor more than, less than or equal to 1? Sol. The ratio of number of holes and number of conduction electrons in a p-type semiconductor is less than 1.
  5. Draw the energy band diagram of p-type semiconductor Sol.
  6. Draw the energy band diagram of n-type semiconductor

Sol.

  1. What are ‘holes’? Sol. In physics, a hole is an electric charge carrier with a positive charge, equal in magnitude but opposite in polarity to the charge on the electron.
  2. Carbon, silicon and germanium have four valence electrons each. These are characterised by valence and conduction bands separated by energy band gap respectively equal to (Eg)c, (Eg)si and (Eg)Ge- Which of the following statements is true? (a) (Eg)Si < (Eg)Ge < (Eg)c (b)(E)c<(Eg)Ge>(Eg)si (c) (Eg)c > (Eg)si > (Eg)Ge (d) (Eg)c = (Eg)si = (Eg)Ge Ans. (c) Out of the given three elements, energy band gap is maximum for carbon, less for silicon and least for germanium.
  3. The conductivity of a semiconductor increases with increase in temperature because (a) number density of free current carriers increases. (b) relaxation time increases. (c) both number density of carriers and relaxation time increase. (d) number density of current carriers increases, relaxation time decreases but effect of decrease in relaxation time is much less than increase in number density Ans. (d) In semiconductor the density of charge carriers (electron hole) are very small, so its resistance is high when the conductivity of a semiconductor increases with increase in temperature, because the number density of current carries increases then the sped of free electron increase and relaxation time decreases but effect of decrease in relaxation is much less than increase in number density. (2 Marks Questions)
  4. What is meant by the terms, doping of an intrinsic semiconductor? How does it affect the conductivity of a semiconductor? Sol. Doping is the process of adding impurities to intrinsic semiconductors to alter their properties. Normally Trivalent and Pentavalent elements are used to dope Silicon and

electrons.  There is no forbidden gap in the case of metals.  As a result there is large energy gap.  This results in low gap in energy bands.

  1. A semiconductor has equal electron and hole concentration 6×10^8 m-^3. On doping with certain impurity, electron concentration increases to 8×10^12 m-^3. Identify the type of semiconductor doping Sol. ni = 6 × 10^8 / m^3 and ne = 8 × 10^12 /m^3 ne > n 1 so it is N-type semiconductor.
  2. A semiconductor has equal electron and hole concentration of 6×10^8 /m^3. On doping with certain impurity, electron concentration increases to 9×10^12 /m^3. (i) Identify the new semiconductor obtained after doping. (ii) Calculate the new hole concentration. Sol. (i) ni = 6 × 10^8 / m^3 and ne = 9 × 10^12 /m^3 ne > n 1 so it is N-type semiconductor. (ii) ∵ ni^2 = nenh, nh = ni^2 /ne = 36 × 10^16 /9 × 10^12 = 4 × 10^4 /m^3
  3. Distinguish between an intrinsic semiconductor and P-type semiconductor. Given reason, why, a P-type semiconductor crystal is electrically neutral, although nh>>ne? Sol. Intrinsic Semiconductor Extrinsic semiconductor (i) It is a semiconductor in pure form It is a semiconductor doped with a trivalent (like Al, In) impurity. (ii) Intrinsic charge carriers are electrons and holes with equal concentration. Majority charge carriers are holes and minority charge carriers are electrons. (iii) Conductivity depends on temperature Conductivity depends on temperature as well as dopant concentration. In p type semiconductor, trivalent impurity is doped with tetravalent pure semiconductor. Both type of atom (impurity and host semiconductor) are electrically neutral and hence, so produced p type semiconductor is electrically neutral.
  4. How is a p-type semiconductor formed? Name the major charge carriers in it. Draw the energy band diagram of a p-type semiconductor. Sol. The extrinsic p-Type Semiconductor is formed when a trivalent impurity is added to a pure semiconductor in a small amount, and as a result, a large number of holes are created in it. A large number of holes are provided in the semiconductor material by the addition of trivalent impurities like Gallium and Indium.

(3 Marks Questions)

  1. The diagram shows a piece of pure semiconductor, S in series with a variable resistor R, and a source of constant voltage V. Would you increase or decrease the value of R to keep the reading of ammeter (A) constant, when semiconductor S is heated? Give reason. Sol. Value of R should be increased with the increase in temperature of semiconductor as circuit resistance decreases and current tends to increase.
  2. A semiconductor has equal electron and hole concentrations of 2×10^8 /m^3. On doping with a certain impurity, the hole concentration increases to 4×10^10 /m^3. (i) What type of semiconductor is obtained on doping? (ii) Calculate the new electron concentration of the semiconductor. (iii) How does the energy gap vary with doping? Sol.

Energy band diagram of n-type semiconductor

  1. Deduce an expression for the conductivity of p-type semiconductor.

(5 Marks Questions)

  1. On the basis of the energy band diagrams, distinguish between (a) a metal, (b) an insulator and (iii) a semiconductor Sol. Same as 12. B. SEMICONDUCTOR DEVICE (1 Mark Questions)

  2. How does the width of the depletion region of pn junction vary, if the reverse bias applied to it increases? Sol. Under reverse biasing the applied potential difference causes a field which is in the same direction as the field due to internal potential barrier. This results in an increase in barrier voltage and hence the width of depletion layer decreases.

  3. In the following diagrams, write which of the diodes are forward biased and which are reverse biased.

Sol. (i) is reverse biased and (ii) is forward biased.

  1. The figure below shows the V-I characteristic of a semiconductor diode. (i) Identify the semiconductor diode used Sol. The semiconductor diode whose V-I characteristic is shown in the figure is Zener diode. (ii) Draw the circuit diagram to obtain the given characteristic of this device Sol. (iii) Briefly explain how this diode can be used as a voltage regulator Sol. When forward biased, it behaves like a normal signal diode, but when the reverse voltage is applied to it, the voltage remains constant for a wide range of currents. Due to this feature, it is used as a voltage regulator in d.c. circuit.
  2. Draw the voltage current characteristic of a Zener diode. Sol.
  1. When a forward bias is applied to a p-n junction, it (a) raises the potential barrier (b) reduces the majority carrier current to zero (c) lowers the potential barrier (d) none of the above. Ans. (c)
  2. In Figure, V 0 is the potential barrier across a p-n junction, when no battery is connected across the junction (a) 1 and 3 both correspond to forward bias of junction (b) 3 corresponds to forward bias of junction and 1 corresponds to reverse bias of junction (c) 1 corresponds to forward bias and 3 corresponds to reverse bias of junction. (d) 3 and 1 both correspond to reverse bias of junction Ans. (b) When p-n junction is forward biased then the depletion layer is compresses or decrease so it opposes the potential junction resulting decrease in potential barrier junction when p-n junction is reverse biased, it supports and potential barrier junction, resulting increase in potential across the junction.
  3. In Figure, assuming the diodes to be ideal, (a) D 1 is forward biased and D 2 is reverse biased and hence current flows from A to B (b) D 2 is forward biased and D 1 is reverse biased and hence no current flows from B to A and vice versa. (c) D 1 and D 2 are both forward biased and hence current flows from A to B. (d) D 1 and D 2 are both reverse biased and hence no current flows from A to B and vice versa. Ans. (b) As the given circuit, p-side of p-n junction D 1 is connected to lower voltage and n side of D 1 of higher voltage. So D 1 is reverse biased.

In the circuit A is at - 10V and B is at 0(zero) V. So B is positive then A or The p side of p-n junction D 2 is at higher potential and n-side of D 2 is at lower potential. So D 2 is forward biased. Hence, no current flows through the junction B to A and vice versa.

  1. The output of the given circuit in Figure. (a) would be zero at all times. (b) would be like a half wave rectifier with positive cycles in output. (c) would be like a half wave rectifier with negative cycles in output. (d) would be like that of a full wave rectifier Ans. (c) When the diode will be forward biased during positive half cycle of input AC voltage, the resistance of p-n junction is low. The current in the circuit is maximum. So, a maximum potential difference will appear across resistance connected in a series of circuit. So, potential across PN junction will be zero. When the diode will be in reverse biased during negative half cycle of AC voltage, the resistance of p-n junction becomes high which will be more than resistance in series. So, there will be voltage across p-n junction with negative cycle in output.
  2. Can the potential barrier across a p-n junction be measured by simply connecting a voltmeter across the junction? Sol. We cannot measure the potential barrier across p-n junction by voltmeter because the voltmeter must have a resistance very high compared to the junction resistance, the latter being nearly infinite.
  3. Draw the output waveform across the resistor (Figure). Sol. In given circuit waveform is connected at A and waveform obtained across resistance diode conducts when diode is in forward biased so output will be only when input is +1V is between t 1 and t 2. So output waveform will be only t 1 to t 2 which is in given figure.
  1. Explain the use of pn diode as rectifier Sol. The main application of p-n junction diode is in rectification circuits. These circuits are used to describe the conversion of a.c signals to d.c in power supplies. Diode rectifier gives an alternating voltage which pulsates in accordance with time.
  2. Draw the circuit diagram for use of pn junction as a half wave rectifier Sol.
  3. What is a pn junction diode? Define the term dynamic resistance for the junction diode. Sol. A p-n junction diode allows electric current in one direction and blocks electric current in another direction. It allows electric current when it is forward biased and blocks electric current when it is reverse biased. However, no diode allows electric current completely even in forward biased condition.
  4. With the help of a diagram, show the biasing of a light emitting diode (LED). Give its two advantages over conventional incandescent lamps. Sol. A diagram which shows the biasing of Light Emitting Diode (LED).

Advantages of Light emitting diode over incandescent lamp: 1.Since Light Emitting Diode works on the principle of Semiconductors hence LEDs are much more energy efficient than incandescent lamps and hence are generally used in households for low power generating. 2.Very effective maintenance. Since LEDs are replaceable which minimizes its cost and hence it’s eco-friendly and no harm to the environment as compared to ordinary lamps.

  1. Draw and explain the output waveform across the load resistor R, if the input waveform is as shown in the given figure. Sol. When the input is +5V, the diode gets forward biased, the output across R is +5V, as shown in figure. When the input voltage is – 5V, the diode gets reverse biased. No output is obtained across R.
  2. In half-wave rectification, what is the output frequency if the input frequency is 50 Hz. What is the output frequency of a full-wave rectifier for the same input frequency. Sol. Input frequency = 50 HzFor a half-wave rectifier, the output frequency is equal to the input frequency. ∴ Output frequency = 50 Hz
  1. Write the truth table for a NAND gate connected as given in Fig. Hence identify the exact logic operation carried out by these circuits. Sol.
  2. You are given two circuits as shown in Fig., which consist of NAND gates. Identify the logic operation carried out by the two circuits. Sol. (a) In figure a, the first gate is a NAND gate. Its output is fed to a NOT gate (made from a NAND gate). The output is low when both the inputs are high. So we can write the truth table as: A B A.B Y= 𝐀̅̅.̅ ̅𝐁̅ Y = 𝐘̅ ’

Clearly, input Y = A +B. Hence the given circuit performs the function of AND gate. (b) In figure b, the inputs of two NOT gates (made from NAND gates) are fed to a NAND gate. The output of a NAND gate is low when both the inputs are high. So we can write the truth table as A B 𝐀̅ 𝐁̅ 𝐀̅. 𝐁̅

Y= 𝐀̅̅̅. ̅𝐁̅

Clearly output Y = A+B. Hence the given circuit performs the function of an OR gate.

  1. Write the truth table for circuit given in the Fig. below consisting of NOR gates and identify the logic operation (OR, AND, NOT) which this circuit is performing. Sol. The first gate is a NOR gate. The second gate is also a NOR gate with both the input terminals connected together. The logic table for the above circuit is as follows: First NOR gate Second NOR gate A B A+B (^) Y’= 𝐀̅̅̅ +̅̅̅ ̅𝐁̅ A=Y’ B=Y’ (^) Y= 𝐀̅̅ ̅+̅̅̅ ̅𝐁̅ 0 0 0 1 1 1 0 0 1 1 0 0 0 1 1 0 1 0 0 0 1 1 1 1 0 0 0 1 Clearly Y = A̅̅ ̅+̅̅ ̅B̅ = A + B. Thus the given circuit performs OR function.
  2. Write the truth table for the circuits given in the Fig., consisting of NOR gates only. Identify the logic operations (OR, AND, NOT) performed by the two circuits.

Sol. (i) Figure a) depicts the Zener diode's characteristics, whereas figure b) depicts the solar cell. ii) In Figure a), point P denotes the Zener breakdown voltage. iii) Point Q in Figure b) represents zero voltage and negative current.

  1. Explain why elemental semiconductor cannot be used to make visible LEDs. Sol. In elemental conductor, the band gap is such that the emissions are in infrared region and not in visible region. Because the energy released by combination of holes and electrons in elemental semiconductors does not lie in the visible spectrum, elemental semiconductor cannot be used to make visible LED's. (3 Marks Questions)
  2. Explain how the depletion layer and barrier potential are formed in a pn junction diode. Sol. the formation of pn junction, the holes from p-region diffuse into the M-region and electrons from n-region diffuse into p-region and electron hole pair combine and get annihilated. This in turn, produces potential barrier VB across the junction which opposes the further diffusion through the junction.
  3. Explain with the help of a circuit diagram, how the thickness of depletion layer in a p-n junction diode changes when it is forward biased. In the following circuits which one of the two diodes is forward biased and which is reverse biased? Sol. When applied voltage is such that n side is negative and p side is positive, the applied voltage is opposite to the barrier potential. Hence the effective barrier potential, becomes VB – V, and the energy barrier across the junction decreases. Thus the junction width decreases. (i) p-n junction is forward biased (ii) p-n junction is reverse biased.
  4. Explain (i) forward biasing, (ii) reverse biasing of a p-n junction diode. With the help of a circuit diagram explain the use of this device as a half wave rectifier. Sol. Forward biasing indicates the application of a voltage across a diode that enables current to flow easily, while reverse biasing means putting a voltage across a diode in the opposite direction.
  1. Explain with the help of a circuit diagram, how the thickness of depletion layer in a p-n junction diode changes when it is forward biased. In the following circuits which one of the two diodes is forward biased and which is reverse biased?
  1. Explain briefly with the help of circuit diagram, how V-I characteristics of a pn junction diode are obtained in (i) forward bias and (ii) reverse bias. Draw the shape of curves obtained. Sol. Referring to the characteristic curve, The VI characteristic curve of p-n junction diode in forward biased is non linear. The current first increases slowly,almost negligibly,till the voltage across the diode crosses a certain value. After the characteristic voltage,the diode current increases significantly,even for a very small increase in the diode bias voltage.This voltage is called THRESHOLD VOLTAGE or CUT-IN voltage.