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Cork Institute of Technology
Master of Engineering in Telecommunications Engineering - Award
(Level 9)
Autumn 2007
Embedded Systems Software Development
(Time: 2 Hours)
Read instructions carefully
Answer Question 1 and any TWO other questions.
Class notes MAY be used.
Examiners: Mr. P. French Dr. S. McGrath Mr. A. Murphy Mr. D.O’Donovan
Figure 2.1 Figure 2.
(a) Contrast the attributes of Petri-net and statechart diagrams using the examples of an airplane navigation system and a bank teller machine shown in Figures 2.1 and 2.2, respectively. [14 %]
(b) Describe the concept of function queue scheduling in connection with software architectures. [6 %]
(c) Draw a table showing the outcome of Figure 1.1 for a priority-driven, pre-emptive scheduler for a two processor system. [10 %]
J 0 (^) 2/4 J 1 0/
J 2 1/
J 3 0/2^4
J 1/2 J 5 1/
J 6 1/2 J^7 0/
Release Time
Execution Time
Figure 1.1 ( continued over )
40ms
5ms interrupt
1 second interrupt
Navigation
BackgroundTask compute rawRead and accelerometer pulses
compensateRead and gyro data Compensate all data
Update display
1 second
40ms interrupt
(d) i. What is the difference between a pre-emptive and non pre-emptive scheduler? [2 %]
ii. Would the outcome in (c) be affected if a non pre-emptive scheduler were used? If so, indicate in the table where the change(s) would occur. [2 %]
- (a) i. How are interrupts connected to the shared data problem in RTOSs? Use code examples to illustrate the problem. [8 %]
ii. Describe 3 programming approaches for solving this problem. Explain how each method solves the problem using sample code. [9 %]
(b) Describe how the average response time of interrupts may be estimated theoretically.[6%]
(c) The timing diagram in Figure 2.1 shows a task that delays itself for one clock tick. The shaded areas indicate the execution time for each operation being performed.
Tick Interrupt
Tick ISR
All higher priority taks
Delayed Task
Call to delay 1 tick (20ms) (^) Call to delay 1 tick (20ms) (^) Call to delay 1 tick (20ms)
t1 (6ms)
t2 (19ms)
t (27ms)
Figure 2.
i. Using Figure 2.1 to describe the concept of jitter. [4 %]
ii. Describe how the effects of jitter may be mitigated. [6 %]
Figure 4.
(a) Describe how a real-time scheduler may be implemented. During your discussion refer to slack stealing, aperiodic and sporadic jobs. [12 %]
(b) A Mealy finite state machine used to describe the operation of an automatic teller machine is shown in Figure 4.1. For each of the following situations describe a suitable mechanism for inter-process communications:
i. Transfer the cash amount from task B, Enter Selection , to task C, Withdraw. [3 %]
ii. If the envelope acceptance and cash dispensing operations use the same portal at the front of the machine, how would you deal with any potential resource conflicts that may arise during operation? [3 %]
ii. Assume task E, Query , can receive messages of a variable length from task B, Enter Selection, task. Assume a simple message protocol consisting of:
- One byte, representing the number of message bytes to follow, e.g., n.
- The n bytes, representing the remainder of the message. [3 %]
(c) Using μ C/OS-II RTOS syntax, write sample code segments to implement each of the inter-
process communications mechanisms in (c) i, ii and iii above. [12 %]
