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CORK INSTITUTE OF TECHNOLOGY
INSTITIÚID TEICNEOLAÍOCHTA CHORCAÍ
Semester 1 Examinations 2008/
Module Title: Embedded & Integrated Systems
Module Code: COMH
School: Electrical and Electronic Engineering
Programme Title: Master of Engineering in Communication Systems
Programme Code: ETELT_9_Y
External Examiner(s): Mr. Paul French, Dr. Sean McGrath and Mr. Philip Quinlan Internal Examiner(s): Donal O’Donovan
Instructions: Answer ANY 3 questions. Open book examination – class notes allowed
Duration: 2 hours
Sitting: Winter 2008
Requirements for this examination:
Note to Candidates: Please check the Programme Title and the Module Title to ensure that you have received the correct examination paper. If in doubt please contact an Invigilator.
Q1.
Figure 1-
a) The diagram in Figure 1-1 demonstrates some of the aspects of the UML language used to facilitate the modelling of concurrent processes. Using Figure 1-1 as a basis, describe the concurrency mechanisms available in UML with those of other modelling techniques, where appropriate. [10 %]
b) Discuss the merits of 3 different software architectures that may be used in the design of an embedded system. [9 %]
c) You are asked to design a hand-held data logger/bar code scanner. The scanner is activated when the scan trigger is pulled. The device also has an on/off button and three buttons for device configuration. Select a suitable software architecture for the device. Justify your choice by comparing the attributes of your chosen architecture with other potential architectures. Assume that several variations of this product will be put on the market. The tasks running on the scanner are: ( Continued over )
Q3. a) There are several different algorithms for scheduling periodic tasks on a single processor system. Those algorithms fall into two broad categories: clock-driven and priority-driven. Discuss the relative advantages and disadvantages of the two categories of algorithm, explaining when it is appropriate to use a clock-driven scheduler and when one would expect to use a priority-driven scheduler. [6 %]
b) Consider a system of four independent preemptable periodic tasks: T 1 = (5, 2), T 2 = (4, 1), T 3 = (10, 1), and T 4 = (20, 3). All jobs have a phase equal to zero, and a relative deadline equal to their period. Demonstrate that the schedule is infeasible. Alter the schedule so that it is feasible. Construct a cyclic schedule for these tasks, demonstrating that the system meets all deadlines. [10 %]
c) The four independent, preemptable, periodic tasks described in part (b) are to be re- implemented on a system that supports priority scheduling. Which priority scheduling algorithm would you prefer: rate monotonic or earliest deadline first? Justify your answer. [6 %]
d) A revised system specification requires that a periodic calibration task is added to (d). The task needs to execute every 10 time units with an execution time of 2 units. Is the schedule still feasible? [3 %]
Q4. a) Describe how a required data buffer size may be calculated in a communications system using the equation:
( 1 ) 1
u t t
B = ∫ p t − c t dt [4 %]
b) Why is the keyword ‘volatile’ in the C language a necessity in terms of RTOS. [2 %]
c) How would a periodic, cyclic scheduler deal with aperiodic tasks? [2 %] ( Continued over )
d) Three processes are to be scheduled using the Earliest Deadline First scheduling algorithm (EDF). The Processes are as follows:
Process Execution time Period P1 1 3 P2^1 P3 2 6 Figure 4-
i. Determine the hyper-period. [2 %] ii. The processor utilisation time. [2 %] iii. Write down an EDF scheduling scheme that will meet the stated deadlines to 15 time units. [4 %]
e)
Figure 4- i. Contrast and compare the operation of the State Transition Diagrams with Petri-Net real-time specification language and state. [6 %]
ii Using Figure 4-1, illustrate how the dynamic form of Petri-Net may be used to illustrate the temporal operation of a typical automated bank teller machine. Highlight the attributes, discussed in part (i), and demonstrated by this illustration. (A subset of the diagram is sufficient to illustrate your discussion). [3 %]
