Prefetch-Assembly Language, Microprocessors and Computer Architecture-Lecture Slides, Slides of Computer Architecture and Organization

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Prefetch z

Fetch accessing main memory z Execution usually does not access mainmemory z Can fetch next instruction during executionof current instruction z Called instruction prefetch

Improved Performance z

But not doubled: z Fetch usually shorter than execution z Prefetch more than one instruction? z Any jump or branch means that prefetchedinstructions are not the required instructions z Add more stages to improve performance

Pipelining z

Fetch instruction z Decode instruction z Calculate operands (i.e. EAs) z Fetch operands z Execute instructions z Write result z Overlap these operations

Timing of Pipeline

Six Stage Instruction Pipeline

Alternative Pipeline Depiction

Multiple Streams z

Have two pipelines z Prefetch each branch into a separatepipeline z Use appropriate pipeline z Leads to bus & register contention z Multiple branches lead to further pipelinesbeing needed

Prefetch Branch Target z

Target of branch is prefetched in additionto instructions following branch z Keep target until branch is executed z Used by IBM 360/

Loop Buffer Diagram

Branch Prediction z

Predict never taken z Assume that jump will not happen z Always fetch next instruction z 68020 & VAX 11/ z Predict always taken z Assume that jump will happen z Always fetch target instruction

Delayed Branch z

Do not take jump until you have to z Rearrange instructions

Branch Prediction State Diagram

SUMMARY