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Printed Circuit Boards Ultimate
Exam
Question 1. Which IPC certification hierarchy places the Certified IPC Specialist (CIS) at the highest level of authority? A) CIS → CIT → CSE B) CSE → CIT → CIS C) CIT → CSE → CIS D) CIS → CSE → CIT Answer: A Explanation: The CIS is the most senior certification, followed by the Certified IPC Trainer (CIT) and then the Certified IPC Engineer (CSE). Question 2. How often must a Certified IPC Trainer (CIT) recertify to remain current? A) Every 2 years B) Every 3 years C) Every 5 years D) Every 7 years Answer: B Explanation: IPC requires CIT recertification every three years to ensure continued competency. Question 3. The primary purpose of IPC-A-600 is to define: A) Electrical performance specifications B) Visual acceptability criteria for printed boards C) Thermal management guidelines D) Environmental testing procedures Answer: B
Printed Circuit Boards Ultimate
Exam
Explanation: IPC-A-600 is the visual acceptance standard, detailing what a board must look like to be acceptable. Question 4. Which document directly references the performance requirements that complement IPC-A-600 visual criteria? A) IPC- 6012 B) IPC- 2221 C) IPC-7711/ D) IPC- 2581 Answer: A Explanation: IPC-6012 (rigid organic boards) provides performance specifications that work alongside the visual criteria of IPC-A-600. Question 5. In the hierarchy of documentation, which item is considered the most detailed source of board specifications? A) Procurement documentation B) Master drawing C) IPC standard D) Bill of materials Answer: B Explanation: The master drawing contains the complete, detailed board layout and tolerances, superseding higher-level procurement documents. Question 6. Class 1 electronic products are typically used in: A) Aerospace avionics B) Medical implants
Printed Circuit Boards Ultimate
Exam
A) A defect that must be repaired before shipment B) A condition that does not affect functionality and is allowed within tolerances C) Any visible imperfection on the board surface D) A condition that requires a deviation waiver Answer: B Explanation: Acceptable Condition means the defect is minor, does not impact performance, and is within the allowed limits. Question 10. Which term describes a visual defect that renders a board non-conforming? A) Target Condition B) Acceptable Condition C) Non-conforming (Defect) Condition D) Process Indicator Answer: C Explanation: Non-conforming (Defect) Condition indicates a defect that fails to meet the standard and requires correction. Question 11. When inspecting board edges, a “halo” is best described as: A) A bright reflective strip caused by polishing B) A thin, translucent film of resin on the edge C) A raised burr formed during routing D) A crack extending from the edge Answer: B
Printed Circuit Boards Ultimate
Exam
Explanation: Halo is a thin, translucent resin film that can appear on board edges after machining. Question 12. Which edge defect is considered acceptable for Class 1 boards but not for Class 3? A) Burrs greater than 0.15 mm B) V-scoring deeper than 0.5 mm C) Haloing of any size D) Crazing extending 0.2 mm from the edge Answer: B Explanation: V-scoring depth tolerances are stricter for higher-class boards; deeper V-scores are acceptable only in lower-class applications. Question 13. A “crazing” defect on a board edge is: A) A network of fine cracks in the resin surface B) A raised ridge of copper C) A discoloration due to oxidation D) A missing portion of the laminate Answer: A Explanation: Crazing appears as a web of fine cracks on the resin surface, often caused by stress. Question 14. Which of the following is NOT a typical subsurface defect observed under the board surface? A) Blistering B) Delamination
Printed Circuit Boards Ultimate
Exam
Question 17. For plated-through holes (PTH), a “nodule” defect is defined as: A) A protrusion of copper at the hole wall B) A missing plating segment inside the hole C) A void in the copper layer on the outer surface D) An excess of solder inside the hole Answer: A Explanation: Nodules are small copper protrusions on the interior wall of a hole, potentially causing plating issues. Question 18. Which class of product allows the greatest plating void size in a PTH? A) Class 1 B) Class 2 C) Class 3 D) All classes require zero voids Answer: A Explanation: Class 1 boards have the most relaxed void tolerances; higher classes demand tighter control. Question 19. Edge-connector lands must have plating integrity that meets which of the following criteria? A) No visible plating cracks or flaking B) Minimum plating thickness of 10 μm for all classes C) Must be gold-filled for Class 3 only D) Must be free of any surface oxidation
Printed Circuit Boards Ultimate
Exam
Answer: A Explanation: The primary requirement is that the plating be continuous and free of visible cracks or flaking. Question 20. Ink markings on a PCB must be: A) Visible under UV light only B) Permanent, legible, and resistant to solvents C) Applied only on the solder side D) Removed before final testing Answer: B Explanation: Markings must remain legible throughout the product life and resist common cleaning solvents. Question 21. Solder-resist registration tolerance for a Class 2 board is typically: A) ±0.10 mm B) ±0.05 mm C) ±0.20 mm D) No tolerance specified Answer: B Explanation: Class 2 boards require tighter registration (±0.05 mm) to ensure proper coverage of conductors. Question 22. Which of the following indicates a failure of solder-resist adhesion? A) Slight discoloration of the resist
Printed Circuit Boards Ultimate
Exam
Question 25. In microsection analysis, a laminate void larger than 0.5 mm is considered: A) Acceptable for Class 1 only B) Acceptable for all classes C) Non-conforming for all classes D) Acceptable if located near the board edge Answer: C Explanation: Voids larger than 0.5 mm are non-conforming regardless of class because they can affect mechanical integrity. Question 26. Resin recession in a dielectric layer is defined as: A) Expansion of the resin due to moisture absorption B) Shrinkage of resin causing a depression in the laminate C) Delamination of the resin from the copper D) Cracking of the resin surface Answer: B Explanation: Resin recession is the shrinkage or depression of the resin material, often visible as a dip. Question 27. Which of the following is a primary cause of cracks in dielectric materials? A) Excessive copper thickness B) Thermal cycling stresses C) Over-etching of copper traces D) Improper solder mask application Answer: B
Printed Circuit Boards Ultimate
Exam
Explanation: Thermal cycling induces expansion and contraction, leading to cracks in the dielectric. Question 28. The purpose of “etchback” in a multilayer board is to: A) Remove excess copper from outer layers only B) Reduce copper thickness to the target value and improve surface smoothness C) Create a rough surface for better solder adhesion D) Increase the dielectric constant of the board Answer: B Explanation: Etchback removes excess copper, bringing the conductor to the specified thickness and improving planarity. Question 29. Desmear is a process performed to: A) Remove excess solder mask from pads B) Eliminate resin smear on drilled hole walls after drilling C) Clean the surface of the board before coating D) Strip the copper foil from the laminate Answer: B Explanation: Desmear removes resin smears produced during drilling, ensuring proper plating inside the hole. Question 30. For a Class 2 board, the minimum outer-layer conductor thickness is: A) 12 μm B) 18 μm
Printed Circuit Boards Ultimate
Exam
Question 33. An internal annular ring is considered non-conforming if its width is less than: A) 0.15 mm B) 0.25 mm C) 0.35 mm D) 0.45 mm Answer: B Explanation: The minimum acceptable internal annular ring width is 0.25 mm; anything less may compromise mechanical strength. Question 34. Copper “wrap plating” around a drilled hole must be continuous to avoid: A) Excessive copper buildup B) Electrical shorts to adjacent layers C) Hole “knee” cracking and plating delamination D) Increased board weight Answer: C Explanation: Discontinuous wrap plating can create a weak “knee” area that may crack or delaminate. Question 35. Which type of via is defined as having at least one layer that is not exposed on either side of the board? A) Through-hole via B) Blind via C) Buried via D) Stacked via
Printed Circuit Boards Ultimate
Exam
Answer: C Explanation: Buried vias are internal only; they do not appear on the outer surfaces. Question 36. A “microvia” typically has a drilled diameter of: A) 0.5 mm or larger B) 0.3 mm to 0.5 mm C) 0.1 mm to 0.3 mm D) ≤0.10 mm Answer: D Explanation: Microvias are defined as ≤0.10 mm (4 mil) in diameter, usually laser-drilled. Question 37. In a filled via, the target land piercing depth must be within: A) ±0.05 mm of the specified depth B) ±0.10 mm of the specified depth C) ±0.20 mm of the specified depth D) No specific tolerance is required Answer: B Explanation: Filled via land penetration tolerances are generally ±0.10 mm to ensure reliable electrical contact. Question 38. Which defect is most likely to cause a void in a filled via? A) Incomplete laser drilling B) Excessive copper thickness on the inner layer C) Improper prepreg material
Printed Circuit Boards Ultimate
Exam
B) Prevent excessive bending stresses at component pads C) Increase dielectric constant D) Improve solderability of pads Answer: B Explanation: Strain-relief designs distribute mechanical stress, protecting component pads from fatigue. Question 42. Metal-core PCBs must maintain a minimum insulation thickness of: A) 0.1 mm B) 0.2 mm C) 0.3 mm D) 0.5 mm Answer: B Explanation: IPC-A-600 specifies at least 0.2 mm insulation between the metal core and surrounding layers to avoid short circuits. Question 43. The primary purpose of a “thermal plane” in a metal-core board is to: A) Provide mechanical rigidity only B) Serve as a heat-spreading layer for high-power components C) Act as a ground plane for signal integrity D) Reduce board weight Answer: B Explanation: Thermal planes are designed to dissipate heat from high-power components across the metal core.
Printed Circuit Boards Ultimate
Exam
Question 44. In cleanliness testing (ROSE-C), the acceptable limit for total ionic contamination on a Class 3 board is: A) 10 μg/cm² B) 30 μg/cm² C) 50 μg/cm² D) 100 μg/cm² Answer: B Explanation: Class 3 boards have stricter ionic contamination limits, typically ≤30 μg/cm². Question 45. Which method is commonly used to verify board cleanliness in IPC-A-600? A) Visual inspection only B) X-ray fluorescence (XRF) C) Resistivity measurement (ROSE-C) D) Ultrasonic cleaning test Answer: C Explanation: ROSE-C (Resistivity of Solvent Extract) measures ionic contamination by extracting residues and measuring conductivity. Question 46. A short-circuit test on a PCB is performed to detect: A) Open circuits only B) Excessive resistance in power traces C) Unintended electrical connections between conductors D) Incorrect component placement
Printed Circuit Boards Ultimate
Exam
A) Scroll through the entire document manually B) Use the “Find” function for the word “warp” C) Navigate directly to the “Flatness” section under Class 2 D) Open the index and look up “warp, Class 2” Answer: C Explanation: The standard groups flatness specifications by class, allowing direct navigation to the Class 2 warp section. Question 50. The term “process indicator” in IPC-A-600 refers to: A) A defect that must be repaired before shipment B) A visual feature that signals a manufacturing step was performed correctly C) A condition that is acceptable only for Class 1 boards D) A measurement of board thickness Answer: B Explanation: Process indicators are visual cues (e.g., drill marks) that confirm a specific process was executed properly. Question 51. Which of the following edge-routing defects is considered acceptable on a Class 1 board but not on a Class 2 board? A) Nicks longer than 0.5 mm B) Burrs exceeding 0.2 mm C) V-scoring deeper than 0.4 mm D) Haloing extending 0.1 mm from the edge Answer: C Explanation: V-scoring depth tolerances tighten from Class 1 to Class 2; deeper scores are permissible only in lower-class boards.
Printed Circuit Boards Ultimate
Exam
Question 52. A “measling” defect on the base material surface is best described as: A) A small raised copper bump B) A resin blister caused by trapped gases C) A fine line of resin exposure due to incomplete laminate curing D) A surface crack caused by mechanical stress Answer: C Explanation: Measling appears as fine, linear resin exposure where the laminate surface is not fully cured. Question 53. Which condition is classified as “target” for solder mask coverage over a conductor? A) 80 % coverage B) 90 % coverage C) 95 % coverage with no exposed copper edges D) 100 % coverage irrespective of registration Answer: C Explanation: Target condition requires ≥95 % coverage with no exposed copper edges; this ensures protection and reliability. Question 54. In a multilayer board, the acceptable maximum thickness variation (TTV) for a dielectric layer is: A) ±5 % of nominal thickness B) ±10 % of nominal thickness C) ±15 % of nominal thickness
