Download Y86 Processor: Instruction Set Architecture and Programming and more Exams Computer Architecture and Organization in PDF only on Docsity!
Processor Architecture I:
Y86 Instruction Set Architecture
CSCE 230J
Computer Organization
Dr. Steve Goddard
http://cse.unl.edu/~goddard/Courses/CSCE230J
2
Giving credit where credit is due
Most of slides for this lecture are based on
slides created by Dr. Bryant, Carnegie
Mellon University.
I have modified them and added new
slides.
3
Chapter Outline
Background
Instruction sets
Logic design
Sequential Implementation
A simple, but not very fast processor design
Pipelining
Get more things running simultaneously
Pipelined Implementation
Make it work
4
Coverage
The Approach
Work through designs for particular instruction set
Y86---a simplified version of the Intel IA32 (a.k.a. x86). If you know one, you more-or-less know them all
Work at “microarchitectural” level
Assemble basic hardware blocks into overall processor structure » Memories, functional units, etc. Surround with control logic to make sure each instruction flows through properly
Use simple hardware description language to describe
control logic
Can extend and modify Test via simulation
5
Topics
Y86 ISA
CISC vs. RISC
High-level overview of MIPS ISA
6
Instruction Set Architecture
Assembly Language View
Processor state
Registers, memory, …
Instructions
addl , movl , leal , … How instructions are encoded as bytes
Layer of Abstraction
Above: how to program machine
Processor executes instructions in a sequence
Below: what needs to be built
Use variety of tricks to make it run fast E.g., execute multiple instructions simultaneously
ISA
Compiler OS
CPU
Design
Circuit Design
Chip Layout
Application Program
7
%eax %ecx %edx %ebx
%esi %edi %esp %ebp
Y86 Processor State
Program Registers
Same 8 as with IA32. Each 32 bits
Condition Codes
Single-bit flags set by arithmetic or logical instructions
» OF: Overflow ZF: Zero SF:Negative
Program Counter
Indicates address of instruction
Memory
Byte-addressable storage array
Words stored in little-endian byte order
Program registers Condition codes
PC
Memory OF ZF SF
8
Y86 Instructions
Format
1--6 bytes of information read from memory
Can determine instruction length from first byte
Not as many instruction types, and simpler encoding
than with IA
Each accesses and modifies some part(s) of the program state
9
Encoding Registers
Each register has 4-bit ID
Same encoding as in IA
Register ID 8 indicates “no register”
Will use this in our hardware design in multiple places
%eax %ecx %edx %ebx
%esi %edi %esp %ebp
10
Instruction Example
Addition Instruction
addl rA , rB 6 0 rA rB
Encoded Representation
Generic Form
Add value in register rA to that in register rB
Store result in register rB
Note that Y86 only allows addition to be applied to
register data
Set condition codes based on result Two-byte encoding
First indicates instruction type
Second gives source and destination registers
e.g., addl %eax,%esi Encoding: 60 06
11
Arithmetic and Logical Operations
Refer to generically as “ OPl ”
Encodings differ only by “function code”
Low-order 4 bytes in
first instruction word
Set condition codes as side effect
addl rA , rB 6 0 rA rB
subl rA , rB 6 1 rA rB
andl rA , rB 6 2 rA rB
xorl rA , rB (^6 3) rA rB
Add
Subtract (rA from rB)
And
Exclusive-Or
Instruction Code Function Code
12
Move Operations
Like the IA32 movl instruction
Simpler format for memory addresses
Give different names to keep them distinct
rrmovl rA , rB 2 0 rA rB Register --> Register
irmovl V , rB 3 0 8 Immediate --> Register rB V
rmmovl rA , D ( rB) 4 0 rA rB D^ Register --> Memory
mrmovl D ( rB), rA 5 0^ Memory --> Register rA rB D
19
Writing Y86 Code
Try to Use C Compiler as Much as Possible
Write code in C
Compile for IA32 with gcc -S
Transliterate into Y
Coding Example
Find number of elements in null-terminated list
int len1(int a[]);
a 3
20
Y86 Code Generation Example
First Try
Write typical array code
Compile with gcc -O2 -S
Problem
Hard to do array indexing on Y Since don’t have scaled /* Find number of elements in addressing modes null-terminated list */ int len1(int a[]) { int len; for (len = 0; a[len]; len++) ; return len; }
L18:
incl %eax cmpl $0,(%edx,%eax,4) jne L
21
Y86 Code Generation Example #
Second Try
Write with pointer code
Compile with gcc -O2 -S
Result
Don’t need to do indexed addressing
/* Find number of elements in null-terminated list / int len2(int a[]) { int len = 0; while (a++) len++; return len; }
L24:
movl (%edx),%eax incl %ecx L26: addl $4,%edx testl %eax,%eax jne L
22
Y86 Code Generation Example #
IA32 Code Setup
Y86 Code
Setup len2: pushl %ebp xorl %ecx,%ecx movl %esp,%ebp movl 8(%ebp),%edx movl (%edx),%eax jmp L
len2: pushl %ebp # Save %ebp xorl %ecx,%ecx # len = 0 rrmovl %esp,%ebp # Set frame mrmovl 8(%ebp),%edx # Get a mrmovl (%edx),%eax # Get *a jmp L26 # Goto entry
23
Y86 Code Generation Example #
IA32 Code Loop + Finish
Y86 Code
Loop + Finish
L24: movl (%edx),%eax incl %ecx
L26: addl $4,%edx
testl %eax,%eax jne L movl %ebp,%esp movl %ecx,%eax popl %ebp ret
L24:
mrmovl (%edx),%eax # Get *a irmovl $1,%esi addl %esi,%ecx # len++ L26: # Entry: irmovl $4,%esi addl %esi,%edx # a++ andl %eax,%eax # *a == 0? jne L24 # No--Loop rrmovl %ebp,%esp # Pop rrmovl %ecx,%eax # Rtn len popl %ebp ret
24
Y86 Program Structure
Program starts at
address 0
Must set up stack
Make sure don’t overwrite code!
Must initialize data
Can use symbolic
names
irmovl Stack,%esp # Set up stack rrmovl %esp,%ebp # Set up frame irmovl List,%edx pushl %edx # Push argument call len2 # Call Function halt # Halt .align 4 List: # List of elements .long 5043 .long 6125 .long 7395 .long 0
Function
len2:
...
Allocate space for stack
.pos 0x Stack:
25
Assembling Y86 Program
Generates “object code” file eg.yo
Actually looks like disassembler output
unix> yas eg.ys
0x000: 308400010000 | irmovl Stack,%esp # Set up stack 0x006: 2045 | rrmovl %esp,%ebp # Set up frame 0x008: 308218000000 | irmovl List,%edx 0x00e: a028 | pushl %edx # Push argument 0x010: 8028000000 | call len2 # Call Function 0x015: 10 | halt # Halt 0x018: | .align 4 0x018: | List: # List of elements 0x018: b3130000 | .long 5043 0x01c: ed170000 | .long 6125 0x020: e31c0000 | .long 7395 0x024: 00000000 | .long 0
26
Simulating Y86 Program
Instruction set simulator
Computes effect of each instruction on processor state Prints changes in state from original
unix> yis eg.yo
Stopped in 41 steps at PC = 0x16. Exception 'HLT', CC Z=1 S=0 O= Changes to registers: %eax: 0x00000000 0x %ecx: 0x00000000 0x %edx: 0x00000000 0x %esp: 0x00000000 0x000000fc %ebp: 0x00000000 0x %esi: 0x00000000 0x Changes to memory: 0x00f4: 0x00000000 0x 0x00f8: 0x00000000 0x 0x00fc: 0x00000000 0x
27
CISC Instruction Sets
Complex Instruction Set Computer
Dominant style through mid-80’s
Stack-oriented instruction set
Use stack to pass arguments, save program counter
Explicit push and pop instructions
Arithmetic instructions can access memory
addl %eax, 12(%ebx,%ecx,4)
requires memory read and write Complex address calculation
Condition codes
Set as side effect of arithmetic and logical instructions
Philosophy
Add instructions to perform “typical” programming tasks
28
RISC Instruction Sets
Reduced Instruction Set Computer
Internal project at IBM, later popularized by Hennessy
(Stanford) and Patterson (Berkeley)
Fewer, simpler instructions
Might take more to get given task done
Can execute them with small and fast hardware
Register-oriented instruction set
Many more (typically 32) registers
Use for arguments, return pointer, temporaries
Only load and store instructions can access memory
Similar to Y86 mrmovl and rmmovl
No Condition codes
Test instructions return 0/1 in register
29
MIPS Registers
$ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $
$ $at $v $v $a $a $a $a $t 0 $t 1 $t 2 $t 3 $t 4 $t 5 $t 6 $t 7
Constant 0 Reserved Temp. Return Values
Procedure arguments
Caller Save Temporaries: May be overwritten by called procedures
$ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $
$s 0 $s 1 $s 2 $s 3 $s 4 $s 5 $s 6 $s 7 $t 8 $t 9 $k $k $gp $s p $s 8 $ra
Reserved for Operating Sys
Caller Save Temp
Global Pointer
Callee Save Temporaries: May not be overwritten by called procedures
Stack Pointer Callee Save Temp Return Address
30
MIPS Instruction Examples
Op Ra Rb Offset
Op Ra Rb Rd 00000 Fn
R-R
Op Ra Rb Immediate
R-I
Load/Store
addu $3,$2,$1 # Register add: $3 = $2+$
addu $3,$2, 3145 # Immediate add: $3 = $2+ sll $3,$2,2 # Shift left: $3 = $2 << 2
lw $3,16($2) # Load Word: $3 = M[$2+16] sw $3,16($2) # Store Word: M[$2+16] = $
Op Ra Rb Offset
Branch
beq $3,$2,dest # Branch when $3 = $
