University of Florida EEL 3701 Drs. Eric M. Schwartz & Karl Gugel
Department of Electrical & Computer Engineering Revision 0 13-Sep-08
Page 1/3 Quartus ROM Creation Instructions
1
Figure 1: An lpm_rom component.
VCC
A
[9..0] INPUT
D[7.. 0]
OUTPU T
address[9..0] q[7.. 0]
lpm_rom0
inst
D[7. . 0]A[9..0]
Figure 2: ROM with signals named and defined.
Problem: You have an ASM or CPU that you would like to control/test from an EEPROM. How can
you simulate the EEPROM under Quartus?
Solution:
Use the ROM model found in the “megafunctions | storage” library called “lpm_rom.”
Design Procedure:
1. Create a new project and BDF file (File->New…). In your schematic (BDF file), add an “lpm_rom” component found in
the “megafunctions” library under “storage.”
2. The MegaWizard Plug-In Manager should now help you with the rest of your design. (It will give a default name. I
suggest you use it.)
3. Select “Next” to use AHDL for the output file.
4. For the device family, pick something that has RAM. The
FLEX10K family has internal RAM, but only about 2kB. The
FLEX10KE family has a device (the EPF10K200SR240-3) that
has more then 64kB. For our example we will use the
FLEX10KE family (and you will eventually pick the
EPF10K200SR240-3 device).
5. We will make a 1k x 8 bit device (1kB), so we’ll need 8 data
bits and 10 address bits (210=1024 words). Answer “8” for
“How wide should the ‘q’ output bus be?” Answer “1024” for
“How many 8-bit words of memory?” Select “Next”.
6. Remove the checks so that neither the address or data port are
registered. Select “Next”.
7. Enter a new file name for your memory initialization file (MIF)
or use a previously made file like “rom_creation.mif” provided
on our web site. Select “Next”. Select “Next” again. Then
select “Finish”.
8. Place your ROM device somewhere in your “.bdf” window.
You should see something like Figure 1 when you try to
place the component onto your schematic:
9. Add a bus to the address inputs, address[9..0], and a bus to
the data outputs, q[9..0]. Label the address or data bus by
drawing it then typing the name. In Figure 2, we have used
A[9..0] and D[7..0] as the example names. They must be in
the form of “Name[msb..0]” where msb is the most
significant bit’s position, starting from zero on the right.
You can now use these signals anywhere else in your
circuit or as inputs & outputs (as shown in Figure 2).
