Embedded Computing Systems Design, Interrupt Routines, and I/O Strategies, Assignments of Computer Applications

An in-depth exploration of embedded computing system design, focusing on challenges, interrupt routines in a real-time operating system (rtos), and the function of push and pop opcodes. It also delves into the major hardware components of an embedded computer system, the use of assembly language in implementing microcontrollers, and various strategies for i/o software in embedded systems. The document also discusses the limitations of testing embedded systems on a host machine.

Typology: Assignments

2023/2024

Uploaded on 03/21/2024

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27 th
Feb 2024
Embedded Assignment
Cs/m/0234/01/22
a) Describe the function of port 1 and port 2 pins in the 8051 microcontroller:
Port 1 (P1) and Port 2 (P2) are two of the four 8-bit ports available on the 8051 microcontroller.
Here's their functions:
i. Port 1 (P1):
P1 is an 8-bit bidirectional I/O port.
Each pin of P1 can be individually programmed as an input or output pin.
It is commonly used for interfacing with external devices such as LEDs, switches, and other
peripherals.
P1 pins also have alternate functions like providing address lines during external memory
interfacing.
ii. Port 2 (P2):
P2 is also an 8-bit bidirectional I/O port.
Similar to P1, each pin of P2 can be configured as an input or output pin.
P2 is often used for interfacing with external devices, especially when additional I/O pins are
required.
Additionally, P2 pins have alternate functions such as providing data and control signals for
external memory and I/O interfacing.
b) Discuss Challenges in embedded computing system design:
Embedded computing system design faces several challenges, including:
iii. Limited resources: Embedded systems often have constraints in terms of processing
power, memory, and energy consumption.
iv. Real-time constraints: Meeting real-time deadlines while handling multiple tasks can be
challenging, especially in safety-critical applications.
v. Heterogeneous hardware: Integrating diverse hardware components and ensuring
compatibility and reliability can pose challenges.
vi. Software complexity: Developing and maintaining software for embedded systems,
including device drivers and real-time operating systems, can be complex.
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27 th^ Feb 2024 Embedded Assignment Cs/m/0234/01/ a) Describe the function of port 1 and port 2 pins in the 8051 microcontroller: Port 1 (P1) and Port 2 (P2) are two of the four 8-bit ports available on the 8051 microcontroller. Here's their functions: i. Port 1 (P1): P1 is an 8-bit bidirectional I/O port. Each pin of P1 can be individually programmed as an input or output pin. It is commonly used for interfacing with external devices such as LEDs, switches, and other peripherals. P1 pins also have alternate functions like providing address lines during external memory interfacing. ii. Port 2 (P2): P2 is also an 8-bit bidirectional I/O port. Similar to P1, each pin of P2 can be configured as an input or output pin. P2 is often used for interfacing with external devices, especially when additional I/O pins are required. Additionally, P2 pins have alternate functions such as providing data and control signals for external memory and I/O interfacing. b) Discuss Challenges in embedded computing system design: Embedded computing system design faces several challenges, including: iii. Limited resources: Embedded systems often have constraints in terms of processing power, memory, and energy consumption. iv. Real-time constraints: Meeting real-time deadlines while handling multiple tasks can be challenging, especially in safety-critical applications. v. Heterogeneous hardware: Integrating diverse hardware components and ensuring compatibility and reliability can pose challenges. vi. Software complexity : Developing and maintaining software for embedded systems, including device drivers and real-time operating systems, can be complex.

vii. Testing and verification: Testing embedded systems thoroughly, especially under varying environmental conditions, is challenging due to limited access and real-time requirements. c) Describe the two rules followed by interrupt routines in a real-time operating system (RTOS): In a real-time operating system (RTOS), interrupt routines must adhere to two important rules: Keep it short: Interrupt service routines (ISRs) should be kept as short as possible to minimize disruption to the system's real-time behavior. Long ISRs can delay the execution of other critical tasks and affect system responsiveness. Avoid blocking : ISRs should avoid blocking operations such as waiting for resources or performing lengthy computations. Blocking ISRs can lead to priority inversion and affect the system's ability to meet real-time deadlines. d) Discuss the function of push and pop opcodes: The push and pop instructions are used in assembly language programming to manipulate the stack. Here's how they function: Push: The push instruction pushes a value onto the stack. It decrements the stack pointer (SP) and stores the value at the memory location pointed to by SP. Pop: The pop instruction retrieves a value from the top of the stack. It reads the value at the memory location pointed to by SP, increments SP, and returns the value. e) Describe the major hardware components of an embedded computer system: The major hardware components of an embedded computer system include: i. Microcontroller or microprocessor: The central processing unit (CPU) responsible for executing instructions and controlling the system. ii. Memory: Non-volatile memory (e.g., ROM, Flash) for storing firmware and volatile memory (e.g., RAM) for data and program storage. iii. Input/output (I/O) interfaces: Hardware interfaces for connecting external devices such as sensors, actuators, displays, and communication modules. iv. Clock and timing components: Oscillators and timers for generating clock signals and synchronizing system operations. v. Power supply: Circuitry for providing regulated power to the system components.

Tasks acquire the mutex semaphore before accessing the resource, ensuring exclusive access, and release it when done. g) Describe the sequence of events performed by the CPU during a call instruction: During a call instruction (also known as a subroutine call ), the CPU performs the following sequence of events: i. Push Return Address: The CPU pushes the address of the next instruction onto the stack. This address is the return address, indicating where execution should continue after the subroutine call. ii. Jump to Subroutine : The CPU jumps to the address of the subroutine's entry point, starting the execution of the subroutine. iii. Execute Subroutine: The CPU executes the instructions within the subroutine, performing the desired task or computation. iv. Return from Subroutine: Upon reaching the end of the subroutine or encountering a return instruction, the CPU pops the return address from the stack and jumps to that address, resuming execution of the main program. h) Explain the function of the following tools: i. Voltmeter: A voltmeter is a measuring instrument used to measure the voltage difference between two points in an electrical circuit. It typically consists of a display (analog or digital) and probes for connecting to the circuit under test. Voltmeters are used for troubleshooting, testing, and verifying voltage levels in electronic circuits. ii. Ohmmeter: An ohmmeter is a measuring instrument used to measure the electrical resistance of a component or circuit. It applies a known voltage to the component under test and measures the resulting current to calculate the resistance. Ohmmeters are commonly used for continuity testing, component testing, and diagnosing faults in electrical circuits.

i) Describe the different ways used to protect shared data: There are several techniques to protect shared data in multi-threaded or multi-process environments: i. Mutexes: Mutual exclusion locks (mutexes) ensure that only one thread or process can access the shared data at a time, preventing simultaneous access and potential data corruption. ii. Semaphores: Semaphore mechanisms can be used to control access to shared resources by allowing or blocking access based on the semaphore's state. iii. Critical Sections: Critical sections are code segments where shared data is accessed, and access is synchronized using locking mechanisms like mutexes or semaphores. iv. Atomic Operations: Atomic operations ensure that specific operations on shared data are executed atomically, without interruption, to prevent data corruption due to concurrent access. v. Read-Write Locks: Read-write locks allow multiple threads to read shared data concurrently but ensure exclusive access during write operations to prevent data inconsistency. These techniques help ensure data integrity and prevent race conditions when multiple threads or processes access shared data concurrently. j) Discuss the three strategies for I/O software in embedded systems: The three strategies for I/O software in embedded systems are: i. Polling : In polling, the processor continuously checks the status of I/O devices to determine if they are ready for data transfer. While simple to implement, polling can waste CPU cycles and may not be suitable for real-time applications. ii. Interrupt-driven I/O: Interrupt-driven I/O involves using interrupts to notify the processor when I/O devices are ready for data transfer. When an interrupt occurs, the processor suspends its current task and services the interrupt, improving CPU efficiency and responsiveness. iii. Direct Memory Access (DMA): DMA allows I/O devices to transfer data directly to and from memory without CPU intervention. DMA controllers handle data transfer between devices and memory, freeing the CPU to perform other tasks. DMA is beneficial for high- speed data transfer and offloading CPU overhead. These strategies offer different trade-offs in terms of CPU utilization, responsiveness, and complexity, and the choice depends on the specific requirements of the embedded system.

These limitations highlight the importance of testing embedded systems on target hardware to ensure accurate performance and functionality in real-world applications.