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CS 414 : Operating Systems
UNIVERSITY OF VIRGINIA
Department of Computer Science
Fall 2005
Topic 13: Sharing Main Memory -- Paging
Readings for this topic: Ch.8 (8.4 & 8.5)
Paging: goal is to make allocation and swapping easier. Make all chunks of memory the same size, call them pages. Typical sizes range from 512-8k bytes. For each process, a page table defines the base address of each of that process’ pages along with read-only and existence bits. Translation process: page number always comes directly from the address. Since page size is a power of two, no comparison or addition is necessary. Just do table lookup and bit substitution. Easy to allocate: keep a free list of available pages and grab the first one. Easy to swap since everything is the same size, which is usually the same size as disk blocks to and from which pages are swapped.
Problems of paging: Internal fragmentation: The larger the page, the worse this is. Efficiency of access: even small page tables are generally too large to load into fast memory in the relocation box. Instead, page tables are kept in main memory and the re- location box only has the page table’s base address. It thus takes one overhead reference for every real memory reference. Table space: Page tables are big. How big? Consider a 32-bit addresss space with 4k pages as in Windows NT.
Paging with segmentation: use two levels of mapping to make tables manageable. Each segment contains one or more pages. Segments correspond to logical units: code, data, stack. Segments vary in size and are often large. Pages are for the use of the OS; they are fixed-size to make it easy to manage memory. Going from paging to P+S is like going from single segment to multiple segments, ex- cept at a higher level. Instead of having a single page table, have many page tables with a base and bound for each. Call the stuff associated with each page table a segment.
We can share at two levels: single page, or single segment (whole page table).
Pages eliminate external fragmentation, and make it possible for segments to grow without any
reshuffling.
If page size is small compared to most segments, then internal fragmentation is not too bad.
The user is not given access to the paging tables.
Problem with segmentation and paging: extra memory references to access translation tables
can slow programs down by a factor of two or three. Too many entries in translation tables to keep them all loaded in fast processor memory.
Multi-level paging: paging the page table For big address space, two-level paging may not be enough.
The notion of locality: at any given time a process is only using a few pages or segments.
Solution: Translation Look-aside Buffer (TLB). A translation buffer is used to store a few of
the translation table entries. It’s very fast, but only remembers a small number of entries. On each memory reference: First ask TB if it knows about the page. If so, the reference proceeds fast. If TB has no info for page, must go through page and segment tables to get info. Refer- ence takes a long time, but give the info for this page to TB so it will know it for next
This is about as fast as the simple scheme, but a bit more expensive (two comparators instead of one, also have to decide which old entry to replace when bringing in a new entry). Advantage: less likely that there will be conflicts that degrade performance (takes three pages falling in the same place, instead of two).
Cache terminology Direct mapped. Set associative. Fully associative.
Must be careful to flush TB during each context swap. Why? Valid bit
Problem: how does the operating system get information from user memory? E.g. I/O buffers,
parameter blocks. Note that the user passes the OS a virtual address. In some cases the OS just runs unmapped. Then all it has to do is read the tables and translate user addresses in software. However, addresses that are contiguous in the vir- tual address space may not be contiguous physically. Thus I/O operations may have to be split up into multiple blocks.
