Software Pipelining on Multi-Core
Architectures
Alban Douillet, Guang R. Gao
CISC 879 : Software Support for Multicore Architectures
Tom St. John
Dept of Electrical and Computer Engineering
University of Delaware
Prepare for your exams
Study with the several resources on Docsity
Earn points to download
Earn points by helping other students or get them with a premium plan
Guidelines and tips
Prepare for your exams
Study with the several resources on Docsity
Earn points to download
Earn points by helping other students or get them with a premium plan
Software Pipelining on Multi-Core Architectures: Techniques and Experiments, Study notes of Computer Science
The application of software pipelining to multi-core architectures, discussing single-dimension and multi-threaded pipelining, dependencies and synchronization, and experimental results. The authors, alban douillet, guang r. Gao, and tom st. John, present an approach to scheduling and balancing workloads, minimizing synchronization delays, and handling register dependencies.
Typology: Study notes
Pre 2010
1 / 24
This page cannot be seen from the preview
Don't miss anything!
Related documents
Partial preview of the text
Download Software Pipelining on Multi-Core Architectures: Techniques and Experiments and more Study notes Computer Science in PDF only on Docsity!
Software Pipelining on Multi-Core
Architectures Alban Douillet, Guang R. Gao
CISC 879 : Software Support for Multicore Architectures
Tom St. John
Dept of Electrical and Computer Engineering
University of Delaware
Outline • Introduction • Single-Dimension Software Pipelining • Multi-Threaded Software Pipelining • Experiments^ CISC 879 : Software Support for Multicore Architectures
Single-Dimension SWP • Does not simply pipeline innermost loop-^ Pipelines most profitable loop level • Loop levels enclosing selected loop left to globalscheduler^ Selected loop seen as outermost loop^ -^ Selected loop seen as outermost loop^ -^ Inner loops executed sequentially • Able to take advantage of ILP/data localityproperties present in other loops^ CISC 879 : Software Support for Multicore Architectures
SSP Example^ CISC 879 : Software Support for Multicore Architectures
SSP Example^ CISC 879 : Software Support for Multicore Architectures
Multi-Threaded SWP • Several Obstacles Exist • Dependences/resource constraints must berespected • Operation cannot be scheduled before all^ dependences are satisfied^ dependences are satisfied • Memory dependences may exist between threadunits-^ Synchronization is required^ CISC 879 : Software Support for Multicore Architectures
Final Schedule Example^ CISC 879 : Software Support for Multicore Architectures
Final Schedule Example^ CISC 879 : Software Support for Multicore Architectures
Synchronization Delay Example^ CISC 879 : Software Support for Multicore Architectures
Synchronization Delay Example^ CISC 879 : Software Support for Multicore Architectures
Synchronization • Each thread has two counters-^ Synchronization counter
counts number of
synchronization signals received-^ Clock counter
incremented after each WAIT When thread reaches a WAIT, execution continues • When thread reaches a WAIT, execution continues only if synchronization counter greater or equal toclock counter • WAIT implemented with an active loop • SIGNAL is a non-blocking atomic add-in-memoryinstruction^ CISC 879 : Software Support for Multicore Architectures
Innermost Loop Tiling • Allows for coarser-grain synchronization • Execution of
N - 1 instances of the innermost loop n^ pattern is tiled into tiles of
G^ iterations
-^ WAIT and SIGNAL are issued at the entrance and^ exit of each tile^ exit of each tile •^ G , value of min^ CISC 879 : Software Support for Multicore Architectures
G^ that minimizes final schedule length, can be approximated at compile time